In the computations of 3d VLSI parasitic interconnect capacitance, it is very difficult to partition the boundary elements on a multi hole surface.
在3dVL SI互连寄生电容的边界元素法计算中,多孔平面的边界元划分是十分困难的问题。
In the computations of 3d VLSI parasitic interconnect capacitance, it is very difficult to partition the boundary elements on a multi hole surface.
在3dVL SI互连寄生电容的边界元素法计算中,多孔平面的边界元划分是十分困难的问题。
应用推荐