The paper introduces the principle of PLL clock synthesizer and the structure of MC12429, designs the circuit of the High Frequency clock synthesizer.
本文介绍了PLL合成时钟源的原理，介绍了MC 12429的结构，设计出了高频时钟源电路图。
The system based on the frequency synthesizer can offer a high accuracy, high stability and low jitter clock for a high speed and high precision backplane test platform.
该时钟板基于频率合成器来产生高精度、高稳定度、低抖动的时钟，用于高速高精度背板测试平台。
The system based on the frequency synthesizer can offer a high accuracy, high stability and low jitter clock for a high speed and high precision backplane test platform.
该时钟板基于频率合成器来产生高精度、高稳定度、低抖动的时钟，用于高速高精度背板测试平台。
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