The decimation in time (DIT) radix-2 FFT algorithm is analyzed in details with input in normal order and output in bit-reversed order by the binary method.
运用二进制方法对按时间抽取顺序输入倒序输出的基2FFT算法进行了较为详细的分析和论证。
This paper studies the parallelism of the different stages of decimation in time radix 2 FFT algorithm, designs the butterfly and scramble kernels and implements 2d FFT on GPU.
本文研究了基2的时域抽取快速傅立叶变换各阶段的并行性，并据此设计了相应的蝶形和倒序运算核，在GPU上实现了二维fft运算。
The radix-2 decimation-in-time algorithm based on 16-bit fixed-point operation and pipeline architecture are adopted in the core module IFFT(Inverse Fast Fourier Transform).
核心模块快速傅立叶逆变换（IFFT）采用基于16位定点运算的基-2时间抽取算法和流水线结构。
This design adopts the algorithm of radix-4 and decimation-in-time (DIT) to devise a real-time FFT hardware processor with practicality.
设计采用基4算法设计了一个具有实用价值的FFT实时硬件处理器。
Since the decimation of discrete time signals is similar to the sampling of continuous signals, it is also studied in the thesis.
鉴于对离散信号的抽取和对连续信号的采样非常相似，本文还把研究范围拓展到了对离散信号的抽取问题。
Since the decimation of discrete time signals is similar to the sampling of continuous signals, it is also studied in the thesis.
鉴于对离散信号的抽取和对连续信号的采样非常相似，本文还把研究范围拓展到了对离散信号的抽取问题。
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