This paper illustrates the general design of digital frequency meter based on FPGA/CPLD Technology.
简述了基于FPGA/CPLD技术的数字频率计的总体设计。
Experiment iv Cymometer experimental requirements: design of an effective place for the 4 decimal digital frequency meter.
实验四频率计实验要求：设计一个有效位为4位的十进制的数字频率计。
The digital frequency meter is a device which is one kind of using decimal system digital directly display the signal frequency.
数字频率计是直接用十进制数字显示被测信号频率的一种测量装置。
In the digital circuit, the digital frequency meter belongs to the sequence circuit, it mainly by has the memory function trigger constitution.
在数字电路中，数字频率计属于时序电路，它主要由具有记忆功能的触发器构成。
A new method of frequency measurement based on the theory of digital frequency meter is presented. The MCU AT89C51 is used for the center controller.
介绍了一种基于数字频率计原理，以at89 C5 1单片机为控制器件的新型频率测量方法。
The digital frequency meter to achieve the desired requirements of the variable-range measurement, measuring range 0.1Hz-9999MHz, accuracy up to 0.1Hz.
该数字频率计达到预期要求，实现了可变量程测量，测量范围0.1Hz—9999MHz，精度可达0。
The digital frequency meter to achieve the desired requirements of the variable-range measurement, measuring range 0.1Hz-9999MHz, accuracy up to 0.1Hz.
该数字频率计达到预期要求，实现了可变量程测量，测量范围0.1Hz—9999MHz，精度可达0。
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