The design method of LED big screen scanning circuit is introduced, and the virtues of programmable logic device application on high-speed digital system are presented.
介绍了LED大屏幕扫描电路的设计方法，阐述了可编程逻辑器件在高速数字系统应用中的优点。
After the system-level spec and the division of the design hierarchy are comfimed, we start to design the digital logic circuit from the bottom for the pixel machine .
在明确了系统级的总体规划以及设计层次的划分以后，我们从系统的最底层开始进行数字逻辑电路的设计。
Complex Programmable Logic Device (CPLD) is one of Application Specific Integrated Circuit (ASIC) that has been widely used, especially adapt to design digital system.
复杂可编程逻辑器件(CPLD)是目前应用最为广泛的可编程专用集成电路(ASIC)之一，特别适合于数字系统的设计和开发。
The digital logic chip of the invention and the method of design for testing can realize the observation of circuit scanning test by adopting few pins.
本发明的数字逻辑芯片及其可测试设计的方法，能够通过少量管脚实现电路在扫描测试时的可观测。
To shorten the distance between theory and practice, improve the ability of flexible application of digital components, logic circuit design is proposed combination of the fifth step.
为缩短理论与实践的距离，提高灵活应用数字元器件的能力，提出了组合逻辑电路设计的第五步。
A textbook, Analysis and Design of Digital Logic Circuit is compiled, matched with multimedia courseware and the teaching is conducted in multimedia cl...
组织编写了新教材《数字逻辑电路分析与设计》，制作了与教材配套的多媒体课件并用多媒体教室授课。
A textbook, Analysis and Design of Digital Logic Circuit is compiled, matched with multimedia courseware and the teaching is conducted in multimedia cl...
组织编写了新教材《数字逻辑电路分析与设计》，制作了与教材配套的多媒体课件并用多媒体教室授课。
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