We take the Full Adder as an example to introduce the use of VHDL in the design of digital system, the experiment of digital circuit and the teaching.
本文以全加器为例介绍其在数字系统设计和数字电路实验及教学中的应用。
The circuits such as ternary full-adder, etc. designed by using this theory can have simpler circuit structures and correct logic functions. It is confirmed that this theory is efficient in...
应用该理论设计的三值全加器等电路具有简单的电路结构和正确的逻辑功能，从而证明了该理论在指导电流型CMOS电路在开关级逻辑设计中的有效性。
The circuits such as ternary full-adder, etc. designed by using this theory can have simpler circuit structures and correct logic functions. It is confirmed that this theory is efficient in...
应用该理论设计的三值全加器等电路具有简单的电路结构和正确的逻辑功能，从而证明了该理论在指导电流型CMOS电路在开关级逻辑设计中的有效性。
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