• It is called "half-adder" because it has only two inputs and does not provide for a carry input.

    之所以称为加器是因为只有两个输入,即没有进位输入

    youdao

  • This paper brings forward a new viewpoint of using balanced ternary half-adder in the ternary optical computer.

    提出了在三计算机采用对称三进制半加观点,设计了支持这个观点的半加器结构原理图。

    youdao

  • A real time optical logic processor is presented, that can perform binary logic operations in parallel. Experimental result is given of the system as a half adder.

    本文提出了一种实时完成二进制逻辑运算光学并行处理系统,并给出了作为加法器实验结果

    youdao

  • Non coherent demodulation for 2PSK detects relation of carrier wave phase of the interval symbol by the (half period of carrier wave) delay and the adder, then the data is demodulated.

    PSK相干解调法将经延时半个载波周期接收信号原接收信号相加,检测出两相邻码元载波相位变化情况,从而解调出数字信息

    youdao

  • Addend and the summand input, and digital and carry the output device is a half adder.

    法器产生数的装置加数被加数输入,和数进位输出装置为加器。

    youdao

  • Addend and the summand input, and digital and carry the output device is a half adder.

    法器产生数的装置加数被加数输入,和数进位输出装置为加器。

    youdao

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