We have realized the hardware and the software design of DSP high speed data acquisition system. Used the reasonable filter algorithm to increase the system data acquisition precision.
实现了DSP高速数据采集与监控系统的硬件和软件设计，采用了合理的滤波算法提高系统数据采集精度和实时性。
In the area of hardware design, the system uses TMS320LF2407 DSP as microprocessor, and uses intelligent power module (IPM) as inverter, which is drived by high-speed optocouplers.
在系统的硬件设计中，处理器采用TMS320LF2407数字信号处理器（DSP）；逆变器采用智能功率模块（IPM），并采用高速光耦对其驱动。
For the snke of radio surveillance we design the hardware system with the function of IF data sampling, IF data processing and high speed data transferring.
针对通用接收机的中频信号输出，设计了中频信号采集、中频信号处理和高速数据传输硬件系统，应用于无线电监测系统。
It introduces how to design a PCB board of high speed data transmitting system based on PCI part bus, including the discussing of hardware agreement and software agreement.
文章介绍了如何通过PCI局部总线实现高速的数据传送，即介绍了对PC I接口板的开发介绍，其中包括它的硬件协议和软件协议的讨论。
Hardware circuit design of the high speed multi-channel signal acquisition processing system based on VME and the PCI two kind of computers bus is the main part of this thesis.
基于VME和PCI两种计算机总线的高速多通道信号采集处理系统的硬件电路设计是本论文的主要部分。
We design and implement a generic high-speed real-time digital signal processing system using ADSP21060 processors, and introduce software and hardware design methods for the CPS signals.
设计并实现了基于ADSP21060的通用高速实时数字信号处理系统，并以随机脉位调制与随机二相码调相复合脉冲串信号处理为例，给出了软硬件设计方法。
The system with high -speed SOC MCU C8051F360 and FPGA EP2C8T144 as software and hardware design and therefore, the core parts, employs modular design method and implements is worthy of application.
该系统以高速soc单片机c 8051f 360和FPGAEP2C8T144为核心，运用模块化设计方法，实现软硬件设计，具有一定的实用价值。
These problems bring great challenges to the system hardware design, and designing high-speed digital circuit with good si performances has become the dominant factor of system design.
这些问题的出现给系统硬件设计带来了更大的挑战，高速数字电路的信号完整性设计已经成为能否成功的主要因素。
As the packet classification system meet the performance bottleneck in the high speed network environment; this paper presents an idea of design based on the cooperation of software and hardware.
针对高速网络数据分类系统遇到的性能瓶颈，本文提出了一种软硬件协同的设计思路。
This algorithm simplifies the system architecture as well as reduces the complexity of logical design. Moreover it also reduces the hardware resources of high speed memory.
改进算法简化系统结构，降低逻辑设计复杂度，节约了高速存储器部分硬件资源。
The hardware design of detection system includes drive circuit design of high speed CCD camera;
检测系统的硬件设计包括线阵CCD驱动电路的设计；
The hardware design of detection system includes drive circuit design of high speed CCD camera;
检测系统的硬件设计包括线阵CCD驱动电路的设计；
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