The improved model of input buffer presented is to insert a quasi random memory between input queue and arbitration logic at ATM switching unit.

改进的输入缓冲方案是在AT M交换单元的输入队列和仲裁逻辑之间加入一个准随机存储器。

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For example, to get input, we may need to specify the file or device to use as the source, and the address and length of the memory buffer into which the input should be read.

例如，为了获取输入，我们可能需要指定文件或设备作为信息来源，并且要把地址和内存缓冲区的长度放到输入读取的位置。

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This FIFO receiver buffer receives data at an input write-data rate filling up the memory storage cells therein.

这先进先出接收机接收缓冲区写在输入数据速率的内存填补其中的数据存储单元。

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This FIFO receiver buffer receives data at an input write-data rate filling up the memory storage cells therein.

这先进先出接收机接收缓冲区写在输入数据速率的内存填补其中的数据存储单元。

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