I-cache miss (Processor cannot get the next instruction from instruction cache).
I -cache失效(处理器无法从指令缓存获取下一个指令)。
Bochs's internal instruction cache provides a nice trade-off to traditional JIT compilation.
Bochs的内部指令缓存为传统JIT编译进行了很好的权衡。
On modern processors smaller code usually runs faster due to better use of the instruction cache.
在现代处理器上由于广泛使用指令缓存，小代码通常会运行得更快。
Two of the more useful optimizations are better inline support and the ability to exploit the instruction cache locality.
更有用的两个优化是更好的内联支持和利用指令缓存局部性的能力。
Keeping hot functions together (that is, those functions that are used more often) results in better instruction cache use compared to polluting the cache with cold functions.
与将冷函数填入缓存相比，将热函数(也就是那些更常用的函数)放在一起可以更好地利用指令缓存。
It also maintains an instruction cache for improved performance by storing the "micro operations" of the original x86 system (which can be fetched later without the overhead of decoding).
它还通过存储原始x86系统的“微操作”来维护指令缓存(其后可在没有解码开销的情况下提取)，进而改进性能。
If the data or instruction is not present in the cache, or if the cache line is invalidated, the CPU updates its cache by reading the data from the main memory.
如果数据或指令没有出现在高速缓存中，或者如果高速缓存线路无效的时候，CPU通过从主存储器中读数据来更新它的高速缓存。
Neither a memory management unit nor an instruction or data cache are used.
这既不需要使用内存管理单元，也不需要使用指令或数据缓存。
In a computer with the contrasting von Neumann architecture (and no CPU cache), the CPU can be either reading an instruction or reading/writing data fROM/to the memory.
在基于冯诺依曼架构的计算机中（没有CPU缓存），CPU或者从存储器中读取指令或数据，或者在存储器中写入数据。
In a computer using the Harvard architecture, the CPU can both read an instruction and perform a data memory access at the same time, even without a cache.
在使用哈佛架构的计算机中，即使没有缓存，CPU也可以在读取指令的同时进行数据访问。
Experimental results show that it has great influence to improve instruction mean executive speed when the cache is enabled.
实验结果表明，启用高速缓存对提高指令的平均执行速度具有较大影响。
Experimental results show that it has great influence to improve instruction mean executive speed when the cache is enabled.
实验结果表明，启用高速缓存对提高指令的平均执行速度具有较大影响。
应用推荐