Functions of logic synthesis are to transform and optimize the combinational logic functions and produce the pure logic level structural description.

逻辑综合的功能是对组合逻辑函数的描述进行转换和优化，生成与逻辑功能描述等价的优化的逻辑级纯结构描述。

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The above work is intended to set up an automatic logic synthesis system to translate a register transfer level language descriptions into hardware logic diagrams.

上述工作是为了建立一个将寄存器传输级语言描述翻译成硬件逻辑图的自动逻辑综合系统。

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The design includes system level design, RTL level design and logic synthesis.

设计工作包括系统级设计、RTL级设计、逻辑综合。

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The design includes system level design, RTL level design and logic synthesis.

设计工作包括系统级设计、RTL级设计、逻辑综合。

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