The hardware architecture is made up of modular controller, modular exponentiation controller, data register, and modular multiplication operation units.
算法的硬件结构由模乘控制器、模幂控制器、数据寄存器和模乘运算单元构成。
The hardware architecture is made up of modular controller, modular exponentiation controller, data register, and modular multiplication operation units.
算法的硬件结构由模乘控制器、模幂控制器、数据寄存器和模乘运算单元构成。
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