The output characteristics of the RF power LDMOS are greatly affected by the parasitic capacitance.
射频功率LDMOS的寄生电容直接影响器件的输出特性。
In this paper, the background of parasitic capacitance extraction of interconnects are briefly introduced.
对互连寄生电容提取的研究背景进行了简要的介绍。
We insert a parasitic capacitance patch on the rear of the layer in order to adjust the impedance of antenna.
同时在天线臂之间加入了寄生电容，实现阻抗调整的作用。
The parasitic capacitance of the high speed laser is one of those factors which affect the modulation bandwidth.
高速激光器的寄生电容是影响其调制带宽的因素之一。
The noise performance and impedance matching are optimized with RF input parasitic capacitance in consideration.
在考虑输入寄生的前提下，对射频输入端的阻抗匹配和噪声性能进行了优化；
Sometimes, just putting your finger on a clock trace adds enough parasitic capacitance to retard the clock edges.
有时候，只是将手指放在时钟轨迹上，加上足够的寄生电容来延迟时钟沿。
The LNA design method which absorbs the parasitic capacitance of ESD is introduced and compared with the traditional design method.
同时提出了将ESD的寄生电容吸收到LNA输入匹配网络中的设计方式，并与传统的计算方式做了对比。
This may be caused by many factors, and the parasitic capacitance of IGBT is proved to be the key by the experiment and the analysis.
通过实验和理论分析可以证明，其主要起因是IGBT的寄生电容。
At last, the source of the parasitic capacitance is analyzed. The parasitic capacitance's value is calculated and the model is build.
建立了全对称微机械陀螺寄生电容模型，分析了陀螺结构中寄生电容的来源并计算了电容值的大小。
The high frequency parasitic effect of MOSFET is emphasis on, included gate resistance, substrate resistance, and parasitic capacitance.
重点讨论MOSFET的高频寄生参数，包括栅电阻、衬底电阻、寄生电容等。
But there are also some disadvantages, such as the reducing of drain current driving capability and the increasing of parasitic capacitance.
但同时也有一些不足，如漏极驱动能力降低以及寄生电容增大的问题。
Electricity charges and discharges from the multi-layer cabling's parasitic capacitance when signal is transferred among different parts of integrated circuit.
通过集成电路各器件间的布线传递信号的过程，是将信号电荷向布线间形成的寄生电容充放电的过程。
The various applications and features are described of gate-source parasitic capacitance with synchronous rectifier diodes in the realization of actuating rectifier.
阐述了同步整流管的栅源寄生电容在实现整流器件驱动中的不同应用及其特点，并给出了应用实例分析。
The structure can reduce the parasitic capacitance of the sensor, improve the negative resistance characteristics of the sensitive film, and be used in micro gyroscope.
该结构降低了器件的寄生电容，改善了敏感薄膜的负阻特性，适用于共振隧穿效应陀螺。
A vertical cavity surface emitting laser capable of reducing parasitic capacitance while suppressing power consumption, and a method of manufacturing thereof are provided.
本发明涉及一种垂直腔面发射激光器及其制造方法，该垂直腔面发射激光器能够减小寄生电容同时抑制功耗。
The SC filter is insensitive to parasitic capacitance implemented by a simple circuit in the way of combining advance mutation of parasitic resistance and SC negative resistance.
为了获得电容最佳值，提出了一种简单的最优化方法；并采用寄生电阻预畸变与SC负电阻相结合的办法，设计的SC滤波器对寄生电容不灵敏，且电路简单。
The orthogonal coupling error, non-linear of the drive mode, temperature effect and parasitic capacitance of a fully-symmetrical micro gyroscope are test and analyzed in this paper.
本文针对一种全对称微机械陀螺，对其正交耦合误差、驱动非线性、温度特性以及寄生电容来源进行了测试与分析。
Due to the parasitic capacitance and weak output signal, which is limited by its dimensions, it is difficult to improve the resolution and stability of micro accelerometer efficiently.
在测量硅微电容式加速度传感器时，由于器件信号的微弱和寄生电容的干扰，提高加速度的稳定性和分辨率非常困难。
The novel LDMOSFET did not degrade the advantage of SOI structure's low leakage current and parasitic capacitance, which also suppressed the self-heating effects and floating body effects.
工艺和性能模拟分析表明，此结构具有SOI器件低泄漏电流和低输出电容的特性，而且能抑制自加热效应和浮体效应。
SOI refers to the use of a layered silicon-insulator-silicon substrate in IC manufacturing, which is said to reduce parasitic device capacitance and improve performance.
SOI指的是在IC的制造过程中采用硅+绝缘层+硅的硅基体结构方式，这种结构方式的优势是可以减小器件的寄生电容并改善器件的性能。
For example, the peak at 20 MHz in the spectrum is caused by the parasitic oscillation due to the output capacitance of the MOSFET and the leakage inductance of the transformer.
举例说明，20兆赫兹的峰点是钳位过程结束后主要由场效应晶体管输出电容和变压器漏感引起的寄生振荡产生的。
The influence of parasitic interconnect capacitance is much in evidence with the progress of the semiconductor techniques and the increase of chip density and calculated speed.
随着半导体工艺的进步，芯片集成度和运算速度的提高，互连寄生效应的影响也日益明显。
In the computations of 3d VLSI parasitic interconnect capacitance, it is very difficult to partition the boundary elements on a multi hole surface.
在3dVL SI互连寄生电容的边界元素法计算中，多孔平面的边界元划分是十分困难的问题。
The electric characteristic parameters of package for high speed ASIC include propagation delay, characteristic impedance, cross talk, parasitic inductance and capacitance.
高速ASIC封装的电性能参数包括传输延迟、特性阻抗、信号串扰以及封装电感和电容等。
"Long" button S6 can change the type of input parasitic reactivity of the standard (inductance or capacitance).
“长”按钮中六可以改变输入类型的标准(电感或电容的寄生反应)。
In most cases, the load capacitance is not from a capacitor you've added intentionally; most often it's an unwanted parasitic, such as the capacitance of a length of coaxial cable.
多数情况下的电容是我们加进去的，而经常是那些讨厌的杂散电容，正如一根同轴电缆上的电容。
In most cases, the load capacitance is not from a capacitor you've added intentionally; most often it's an unwanted parasitic, such as the capacitance of a length of coaxial cable.
多数情况下的电容是我们加进去的，而经常是那些讨厌的杂散电容，正如一根同轴电缆上的电容。
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