The variable impedance scaling method for design of SCN has been improved in the Paper, the resulting is that the analogue filter can be realized by Passive SCN.
改进了目前采用的开关电容网络阻抗标度设计法，使模拟滤波器可以用无源开关电容网络完成。
A passive loop filter scheme and the design method of the filter for current charge pump PLL frequency synthesizer chip are given in the paper.
针对电流型电荷泵PLL频率综合器芯片，提出一种称为极值相位裕量的无源环路滤波器方案和设计方法。
This method is also suited to design approximation function of passive filter.
这种方法同样适用无滤波器的近似函数设计。
This paper gives the design and experimental results of low noise NPLL frequency synthesizer and concludes that the passive loop filter is more suitable for low noise design than active loop filter.
介绍低相噪NPLL频率综合器的设计及实验结果。提出用无源环路滤波器比用有源环路滤波器更好，可获得低相噪设计。
A design methodology of active-RC complex filter is proposed in this paper, with which one can determine the parameters of passive components quickly.
提出了一种采用有源r C滤波器实现复数滤波器时可快速确定无源器件参数值的设计方法。
The paper analyzes the design method of passive loop filter thoroughly, and presents a effective design method. The method has obvious advantage comparing to the design method in existence.
对锁相环的环路滤波器的设计方法进行了深入研究，给出了一种环路滤波器设计方法，该设计方法与现有设计方法相比具有较明显的优点。
Upon the low power design consideration, a hybrid active-passive loop filter is employed and the signal summing block is removed by using discrete-time differentiation technique.
基于低功耗设计考虑，调制器采用有源-无源混合型环路滤波器，并通过离散时间微分技术移除信号求和模块。
Upon the low power design consideration, a hybrid active-passive loop filter is employed and the signal summing block is removed by using discrete-time differentiation technique.
基于低功耗设计考虑，调制器采用有源-无源混合型环路滤波器，并通过离散时间微分技术移除信号求和模块。
应用推荐