Some of the scenarios and challenges presented by CAD and PLM vendors can be (with a bit oversimplification) presented as a synchronization of the content from iCloud to multiple places.
一些CAD和PLM供应商提出的情景和挑战之一是，从iCloud向多种平台的内容同步。
They could have scored higher. Just a little bit out of synchronization.
他们本能拿到更高分的，就差有点儿不同步。
The bit synchronization detect is very important in opened loop timing recovery of all digital receivers.
位同步检测是实现全数字接收机开环定时恢复的关键技术。
To demodulate GMSK signal, DSP is used in receiver to achieve error spectrum estimation, bit synchronization recovery and decode.
为了实现GMSK信号解调，接收机中dsp实现了调制信号的误差频谱估计、位同步恢复及译码。
The line code is an efficient way to make the baseband digital signal have some massage about the bit synchronization.
经过线路编码，可以使基带信号含有定时信息，解决了通信中的位同步。
Under weak signal environments, bit synchronization is very important and difficult in GPS receiver design.
弱信号下的比特同步在GPS的接收机设计中是一个重点也是一个难点。
The performance of synchronization tracking using pilot is analyzed, followed by a numerical method to determine the optimal lock loop parameters to minimize average bit error rate (BER).
分析了利用导频同步跟踪的性能，以及提出了一个数值方法确定最优环路参数以最小化误码率。
The most important steps for navigation data extraction are bit synchronization and frame synchronization.
导航电文提取中最重要的步骤是位同步和帧同步。
The USB electrical specifications describe the port driver circuit, electrical level of data transmission, code structure, bit synchronization and power distribution.
USB的电气特性反映了端口驱动电路、传输电平、编码结构、位同步处理及供电方式。
They could have scored higher. Just a little bit out of synchronization.
还不错，但就是两个人不是太同步。
A fast bit synchronization technique for upstream cell in PON is presented.
介绍一种PON上行信号元快速比特同步结构及其实现。
Traditional Lag-Lead synchronous DPLL shortcomings slow. In order to solve this problem, proposed a method for FPGA-based realization method of fast bit synchronization.
针对传统超前-滞后型数字锁相环实现同步速度较慢的缺点，提出了一种基于步进和量化调整的数字锁相法的快速位同步方法。
A fast bit synchronization technique PON for upstream cell is presented.
介绍一种PON上行信号元快速比特同步结构及其实现。
HDL is an essential general tool in digital logical circuit design. A HDL implementation of the integral bit synchronization with good performance is provided.
HDL是设计数字逻辑电路必不可少的通用工具，该文给出了位同步性能较好的积分型自同步的一个HDL实现。
In the troposcatter communication at low rate or medium rate, a bit synchronization used by modem is usually extracted from the envelope that contains synchronization information.
在中低速散射通信中，调制解调器的位同步信号通常从含有同步信息的包络中提取。
A hardware electrocircuit scheme for bit synchronization are designed to met the demands of bit synchronization little paroxysmal data receiving in wireless digital system.
针对短时突发数据接收对位同步电路的要求，设计一种基于FPGA的硬件开环位同步电路。
DataExchange v4 Real-Time Backup Edition and Data Synchronization Edition are both available as native 64-bit applications.
数据狡猾v4Real - Time备份版本和数据同步版本都是根据本土64位应用程序开发的。
Jitter and misplace of the bit synchronization signal will reduce the anti-interference performances of communication equipment directly, also increase bit error probabaility.
位同步信号本身的抖动、错位会直接降低通信设备的抗干扰性能，使误码率上升，甚至会使传输遭到完全破坏。
Finally, the packet marker bit is replaced by the use of a one's complemented synchronization flag.
最后，分组标记符比特通过使用1的补码的同步标记替代。
Symbol timing recovery (Bit Synchronization) is the key technology in the digital communication.
码元定时恢复(位同步)技术是数字通信中的关键技术。
Symbol timing recovery (Bit Synchronization) is the key technology in the digital communication.
码元定时恢复(位同步)技术是数字通信中的关键技术。
应用推荐