The bit synchronization detect is very important in opened loop timing recovery of all digital receivers.
位同步检测是实现全数字接收机开环定时恢复的关键技术。
The line code is an efficient way to make the baseband digital signal have some massage about the bit synchronization.
经过线路编码，可以使基带信号含有定时信息，解决了通信中的位同步。
Symbol timing recovery (Bit Synchronization) is the key technology in the digital communication.
码元定时恢复(位同步)技术是数字通信中的关键技术。
HDL is an essential general tool in digital logical circuit design. A HDL implementation of the integral bit synchronization with good performance is provided.
HDL是设计数字逻辑电路必不可少的通用工具，该文给出了位同步性能较好的积分型自同步的一个HDL实现。
A hardware electrocircuit scheme for bit synchronization are designed to met the demands of bit synchronization little paroxysmal data receiving in wireless digital system.
针对短时突发数据接收对位同步电路的要求，设计一种基于FPGA的硬件开环位同步电路。
A hardware electrocircuit scheme for bit synchronization are designed to met the demands of bit synchronization little paroxysmal data receiving in wireless digital system.
针对短时突发数据接收对位同步电路的要求，设计一种基于FPGA的硬件开环位同步电路。
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