Presented and implemented in this paper is a fanout source based fault parallelism fault simulator for synchronous sequential circuits.
从工程应用的角度出发,同步时序电路故障模拟采用单测试码故障并行的模拟结果更能反映实际情况。
Presented and implemented in this paper is a fanout source based fault parallelism fault simulator for synchronous sequential circuits.
从工程应用的角度出发,同步时序电路故障模拟采用单测试码故障并行的模拟结果更能反映实际情况。
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