Once you begin adjusting GTLREF voltages (for each core data and address bus) you will find that different bus frequencies respond differently to variations in the voltage.
一旦你开始调整GTL ref电压(单独针对每个核心数据和地址总线)你将会发现不同的总线频率需要不同的电压组合。
On a write, the DIF is generated by the host bus adapter (HBA), based on the block data and logical block address.
在写数据时，主机总线适配器(HBA)根据块数据和逻辑块地址生成dif。
The bus is the computer parts connected by a bunch of public signal, address bus, data bus and control bus composition.
总线是连接计算机各部件的一簇公共信号线，由地址总线、数据总线和控制总线组成。
To a micro-controller, the PDIUSBD12 appears as a memory device 8-bit data bus and 1 address bit (occupying 2 locations).
对微控制器而言，PDIUSBD12看起来就像一个带8位数据总线和一个地址位（占用两个位置）的存储器件。
Port 0 is also the multiplexed low-order address and data bus during access to external program and data memory.
端口0也是复低位地址和在利用外部程序和数据存储器的数据总线。
The memory system of dual channel A/D automatic acquisition is studied in this paper. Using transceivers and gating controllers, the data bus and address bus of RAM are respectively controlled.
本文研究了双通道A/D自动采集存储系统，利用数据收发器及数据选通控制器分别控制RAM的数据线及地址控制线。
Due to lack of data and address parallel bus on TMS320F2808, the two DSPexchange data by means of communication through SPI interface.
由于采用的TMS320F 2808不具备数据总线与地址总线，两个DSP之间采用SPI串行通讯的方式实现数据交换。
Due to lack of data and address parallel bus on TMS320F2808, the two DSPexchange data by means of communication through SPI interface.
由于采用的TMS320F 2808不具备数据总线与地址总线，两个DSP之间采用SPI串行通讯的方式实现数据交换。
应用推荐