This process is commonly called direct execution, because the instructions are executed directly by the host processor.
因为通过主机处理器直接执行指令，所以此过程通常被称为直接执行。
Instructions produced for the default processor may be outside the set of instructions understood by the host processor.
为默认处理器生成的指令可能超出主机处理器所能理解的指令集的范围。
A number of improvements in network adapters that offload protocol processing from the host processor are provided.
在用于从主机处理器中卸载协议处理的网络适配器方面提供了多个改进。
The direct memory access engine executes two or more of the plurality of programs without intervention by a host processor.
通过所述直接存储器存取引擎并且在没有主机处理器干预的情况下执行所述多个程序中的两个或更多的程序；
Modules with microcontrollers in the system process their signals parallelly, and communicate with host processor by dual port memory.
以单片机为核心的各传感器接口模块并行处理各传感器信号，并通过双口存储器与上位处理器通信。
Alternatively, new words may also be defined in assembly code, since most Forth implementations include an assembler for the host processor.
并且新word可以用汇编码来定义因为大部分Forth实现包含了寄主上处理器的汇编器。
A host system for downloading one or more Radio data system (RDS) group type processing routines for RDS data includes a data processor and a host processor.
本发明提供一种用于针对无线电数据系统(rds)数据而下载一个或一个以上RDS群组类型处理例程的主机系统，其包括数据处理器及主机处理器。
The host processor main control unit using STM32F103V8 achieve instrument control, wireless transceivers, alarm indicator, remote control, and work status display.
主机采用STM 32f 103 V 8处理器为主控单元，实现仪器操控、无线收发、报警指示、远程控制及工作状态显示等功能。
In order to generate the exact set of the host processor's instructions, the JIT compiler needs to precisely determine the architecture type of the underlying processor.
为了生成主机处理器的正确的指令集，JIT编译器需要明确地确定底层的处理器的体系结构类型。
You also need to know whether the JVM correctly determines host processor architecture so that the JIT compiler can produce the correct set of instructions for that architecture.
您还需要知道J VM能否确定主机处理器的体系结构，以使得JIT编译器可以为那个体系结构生成正确的指令集。
Trying to skip basic JIT compilation of certain methods that the JIT compiled into some of the ISA instructions not belonging to the set understood by the host processor hardly makes sense.
尝试忽略对某些方法的基本JIT编译，因为那样编译得到的一些IS A指令不属于主机处理器能够理解的集合，没有什么意义。
The IPN250 combines a single GT240 96-core CUDA GPU with an Intel Core2 Duo host processor operating at 2.26GHz and 8 GBytes of DDR3 SDRAM to deliver up to 390 GFLOPS of performance per card slot.
IPN250结合了一个GT240 96核心CUDAGPU，英特尔酷睿2.26GHz双核处理器和8G DDR3SDRAM，可以提供每卡高达390GFLOPS的运算性能。
The whole system is made up of a main computer and many intelligent nodes. Each intelligent node takes on microcontroller AT89C51 as host processor and Neuron chip TMPN3120 as slave processor.
系统由一台上位机和多个智能节点组成，智能节点采用单片机at89c51为主处理器，神经元芯片TMPN3120为从处理器。
The use of RDMA enables direct updates in member host memory without requiring member processor time.
RDMA的使用支持成员主机内存中的直接更新，不需要成员处理器时间。
Because the virtual machine will use the same processor as the host as a baseline, it requires that the host environment and the cloned physical server have compatible types of processors.
由于虚拟机将使用与主机相同的处理器作为基准，因此要求我们克隆的主机环境和物理服务器具有兼容的处理器类型。
On an 8 processor host, the best performance was observed with two two processor VMs when all processors are used for jobs.
在8处理器主机上，可以看到，当所有处理器用于处理任务时，有两个处理器性能最优。
QEMU is a fast processor emulator that USES dynamic translation to achieve a reasonable speed while being easy to port to new host CPUs.
QEMU是一个快速处理器模拟器，它使用了动态翻译技术来实现一种合理的速度，同时可以很容易地移植到新的主机CPU上。
With 4 * 4 processor VMs on a single X5560 based host server, you can see the results when compared against a physical server of the same specification with Hyper-threading disabled.
在基于单个X5560的主机服务器上有4 * 4 个处理器，可通过与具有相同规模，已关闭 Hyper-threading 的物理服务器对比，来查看其结果。
Each machine runs a daemon called gmond which collects and sends the metrics (like processor speed, memory usage, etc.) it gleans from the operating system to a specified host.
每台计算机都运行一个收集和发送度量数据（如处理器速度、内存使用量等）的名为gmond 的守护进程。它将从操作系统和指定主机中收集。
If your host and guest operating system are targeted to the same processor architecture, then you can speed things up to near native performance using the QEMU accelerator (KQEMU).
如果主机操作系统和来宾操作系统运行于相同的处理器架构之上，那么您可以使用QEMU加速器(KQEMU)实现近似本地的性能。
The processor also supports the memory translation process by tapping into the hypervisor (host kernel) when an unmapped memory location is accessed.
处理器也可以通过在访问未经映射的内存位置时使用系统管理程序(主机内核)来支持内存转换进程。
Bluetooth headsets, for example, combine the module and host portions of the stack on one processor because they need to be small and self-contained.
如，蓝牙头戴式耳机将协议的主机和模块部分结合在一个处理器，因为它们需要做得小巧和自我完备的。
The host OS and the disk drive operating system can be run on a single processor.
主机操作系统可作为盘驱动器操作系统下的任务运行。
The testing data is sent to FPGA board through serial ports. This processor reads the data and sends to PC host.
为了准确测试本处理器的运行情况，本文应用串口传递测试数据入FPGA开发板，测试模块读入测试数据，发送入PC机的主机端。
A host controller transfers data over a bus communication system, under the control of a processor, in individual transactions.
一种主机控制器在处理器的控制下经由总线通信系统在单独事务中传送数据。
In the system, a general purpose microcomputer is the host and the micro-array-processor (MAP) is an option.
该系统以通用微型计算机为主机，阵列处理机(map)作为选件。
Data processor software on the host can be modified easily to suit different condition, which is the biggest advantage of this kind of system.
这种方案最大的优势是上位机端的数据处理软件易于修改，以面向不同的应用。
Working as a back end processor attached to a host machine, LP uses microprograms to interpret directly an intermediate code generated by the host.
LP作为后端机挂接在主机上、以微程序直接解释主机生成的与LISP语义接近的中间码，从而缩小了LP的机器语言与LISP的语义差别。
Screen data is generated by a screen generating processor (74) of a control host computer (7) and transmitted to a programmable display apparatus (5).
画面数据在控制用主计算机(7)的作画处理部(74)作成后，传送于可编程显示器(5)。
Screen data is generated by a screen generating processor (74) of a control host computer (7) and transmitted to a programmable display apparatus (5).
画面数据在控制用主计算机(7)的作画处理部(74)作成后，传送于可编程显示器(5)。
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