• 一个存储器地址输出适宜总线上的二进制数据所组成。这个总线我们称为地址总线

    A memory address consists of binary data being output on an appropriate bus which we call the address bus.

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  • 端口0也是低位地址利用外部程序数据存储器数据总线

    Port 0 is also the multiplexed low-order address and data bus during access to external program and data memory.

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  • 控制器而言,PDIUSBD12看起来就带8位数据总线一个地址占用个位置)的存储

    To a micro-controller, the PDIUSBD12 appears as a memory device 8-bit data bus and 1 address bit (occupying 2 locations).

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  • 控制器而言,PDIUSBD12看起来就带8位数据总线一个地址占用个位置)的存储

    To a micro-controller, the PDIUSBD12 appears as a memory device 8-bit data bus and 1 address bit (occupying 2 locations).

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