本文针对超深亚微米通用微处理器中的多级tlb设计开展研究。
This research focuses on multi level set associative TLB performance of the general purpose microprocessor.
光刻校正技术已成为超深亚微米下集成电路设计和制造中关键的技术。
The optical lithography correction techniques become key technologies in the IC designing and manufacturing of VDSM.
超深亚微米ic设计中互连线的串扰情况与详细布线方案和信号波形密切相关。
In IC design under VDSM technology, the crosstalk situation of interconnecting is related nearly with the scheme of detailed routing and the waveforms of signals.
超深亚微米工艺下，串扰的出现会导致在电路设计验证、测试阶段出现严重的问题。
Current design trends have shown that crosstalk issues in deep sub-micron can cause severe design validation and test problems.
硅片上互连线几何变异提取对于超深亚微米工艺节点下集成电路可制造性设计研究开发极其关键。
Interconnect geometric variation extraction is a key factor for the integrated circuit design for manufacturability research and development, under ultra deep sub-micro process nodes.
超深亚微米半导体结构中的局域微应力、应变的精确测量通常必须借助复杂的微结构分析、测量手段。
The accurate measurements of local micro-stress and strain in ultra deep sub-micron semiconductor structures usually resort to complicated microstructure analysis, measurement methods.
本项研究针对影响超深亚微米物理设计的主要技术难点信号完整性问题，在提高电源规划质量的同时，分别对串扰效应和天线效应进行了相应的抑制。
As for the SI which is the main problem for VDSM physical design, the design offers a correspondent restraint to crosstalk and antenna while improving power plan.
本项研究针对影响超深亚微米物理设计的主要技术难点信号完整性问题，在提高电源规划质量的同时，分别对串扰效应和天线效应进行了相应的抑制。
As for the SI which is the main problem for VDSM physical design, the design offers a correspondent restraint to crosstalk and antenna while improving power plan.
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