To reduce the power dissipation and chip size of digital calibration circuits of pipelined analog-to-digital converter (ADC), a new statistics-based background calibration technique is presented.
为了降低流水线模数转换器中数字校准电路的规模和功耗,提出了一种新的基于信号统计规律的后台数字校准技术。
This paper describes the design and analysis of a fully differential, gain-enhanced CMOS telescopic operational transconductance amplifier (OTA) used in a pipeline analog-to-digital converter (ADC).
提出了一种应用于流水线型模数转换器(adc)的增益提高型套筒式全差分跨导放大器(OTA)的设计与分析方法。
A method of implementing digital lock in amplifier with DSP (digital signal processor) and sampling ADC (analog digital converter) is discussed.
探讨了用DSP(数字信号处理器)和采样adc(模数转换器)实现数字锁定放大器的一种方法。
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