基于PCI总线的边界扫描主控器(硕士)_毕业设计论文网 关键词：JTAG，边界扫描，PCI总线，FPGA [gap=1337]Key Words : JTAG，Boundary-scan，PCI-bus，FPGA
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boundary scan [计] 边界扫描 ; 边界扫描硬件测试 ; 边界扫描技术
Boundary Scan Test 边界扫描测试 ; 边界扫描测试技术 ; 扫描测试
Boundary-Scan Chain 成一个边界扫描链 ; 扫描链
Boundary scan system 边界扫描测试
Boundary-Scan-Kette JTAG 通过边界扫描键
Boundary Scan Cell 边界扫描单元
Boundary Scan Description Language 边缘扫描描述语言 ; 最后提出了边界扫描语言
boundary scan design 边界扫描设计
boundary-scan description language 边界扫描描述语言
Boundary-scan technique(BST) is a new and effective way of test and design for testability for VLSI circuits.
边界扫描机制是一种新型的VLSI电路测试及可测试性设计方法。
参考来源 - 期刊学术社区In this paper the boundary-scan conception, features and design methods are introduced. Its design frame is also shown.
本文介绍了边界扫描技术的概念、特点及其设计方法,给出了设计的部分框架,讨论了边界扫描技术的应用。
参考来源 - JTAG边界扫描技术的研究和设计·2,447,543篇论文数据，部分数据来源于NoteExpress
以上来源于: WordNet
This paper chooses USB logic analyzer as a typical tested object, and carries through a second develop to design it supporting IEEE 1149.1 boundary-scan function for testability.
本文以usb逻辑分析仪作为一种典型的被测对象，进行了可测性设计的再开发工作，使其具有支持IEEE 1149.1边界扫描功能的设备结构。
The paper also discusses two intelligent fault diagnostic methods: expert system intelligent fault diagnostic method and boundary-scan technique intelligent fault diagnostic method.
本文还讨论了两种智能故障诊断技术，即专家系统智能故障诊断技术和边界扫描测试智能故障诊断技术。
On the basis of mixed-signal Boundary scan technology, a scheme of mixed-signal Boundary-scan test system is presented and the hardwares are implemented, including the controller and display unit.
基于混合信号边界扫描技术标准，提出混合信号边界扫描控制器的设计方案并实现了其硬件设计，包括边界扫描控制模块、显示驱动模块等。
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