cell based ASIC 现场可编程们阵列
The decomposition of multilevel logic functions based on standard cell libraries used in ASIC synthesis is presented in the paper.
本文提出在ASIC综合技术中基于标准单元库的多级逻辑函数分解技术。
A new FIFO-based asynchronous wrapper was proposed, which implemented using only standard cell and optimized in a standard digital ASIC flow.
本文采用通用的数字ASIC设计流程，在仅使用已有标准单元的情况下，提出了一种新的基于FIFO的异步包装。
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