... clock-on circuit 强制同步电路 Clock : On main display 时钟在主显示屏 So let,the clock march on-ward 任时间流淌 ...
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Low-power oriented design techniques include selecting low-power parts, low operation voltage, managing clock of MCU or making MCU turn into dormancy, managing power supply of circuit and so on.
低功耗设计的关键技术包括选用低功耗的各类器件,低工作电压,对MCU进行时钟管理或休眠,对各部分电路和器件进行电源管理等。
The paper introduces the design of digital clock based on FPGA and VHDL, the time of clock can be displayed with the digital driving circuit.
介绍了利用VHDL硬件描述语言结合FPGA可编程器件进行数字钟的设计,并通过数码管驱动电路动态显示计时结果。
The VCO module makes use of differential coefficient circuit design technology to lower the effect of power resource on the clock signal input shake.
系统VCO模块采用微分电路设计技术,可将电源噪音对时钟信号输出抖动的影响降至最低。
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