Full differential dynamic comparator is designed, which can save offset voltage; common-mode feedback circuit and digital error correction circuit are designed.
比较器采用开关电容全差分动态结构,可以有效的减小失调电压。 还设计了相应的共模反馈电路和数字校正电路。
参考来源 - 12位50Msps流水线A/D转换器的研究与设计·2,447,543篇论文数据，部分数据来源于NoteExpress
Auxiliary feedback amplifiers and switched capacitor common mode feedback circuit are employed.
共模反馈电路由开关电容共模反馈电路实现。
Used the switched capacitor Common Mode Feedback circuit(CMFB) in main amplifier to achieve a large output voltage swing and decrease the static power consumption at the same time.
主放大器采用开关电容共模反馈电路在获得大输出摆幅的同时降低了功耗。
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