It is found that ESR decreases with decrease of the active dielectric layer thickness, and DC resistance decreases with the increases of active dielectric layer number.

研究表明，等效串联电阻随着有效介质层厚度的降低而降低，直流电阻随着有效介质层数的增加而降低。

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Facing main topics are enhancement of dielectric constant of ceramics, decrease of it "s firing temperature. decrease of dielectric layer thickness and keeping reliable contact of electrodes."

提高瓷的介电常数，减小介质层的厚度，保持电极可靠的接触及降低瓷料的焙烧温度是当前的主要研究课题。

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Dielectric constant polarization coercive voltage and leakage current have relations with the thickness of thin films because of the interface layer.

界面层的存在使介电系数、自发极化、矫顽电压、漏电流都与薄膜的厚度有关。

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