The radix-2 decimation-in-time algorithm based on 16-bit fixed-point operation and pipeline architecture are adopted in the core module IFFT(Inverse Fast Fourier Transform).
核心模块快速傅立叶逆变换（IFFT）采用基于16位定点运算的基-2时间抽取算法和流水线结构。
This paper studies the parallelism of the different stages of decimation in time radix 2 FFT algorithm, designs the butterfly and scramble kernels and implements 2d FFT on GPU.
本文研究了基2的时域抽取快速傅立叶变换各阶段的并行性，并据此设计了相应的蝶形和倒序运算核，在GPU上实现了二维fft运算。
The decimation in time (DIT) radix-2 FFT algorithm is analyzed in details with input in normal order and output in bit-reversed order by the binary method.
运用二进制方法对按时间抽取顺序输入倒序输出的基2 FFT算法进行了较为详细的分析和论证。
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