design of three-valued logic circuit 三值逻辑电路的设计
CMOS symmetrical three-valued ternary logic circuit was designed and fabricated, based on the information associated with symmetrical ternary logic combined with CMOS circuit processing features.
根据有关对称三进制逻辑的资料，结合CMOS电路生产工艺特点，设计并试制了对称三值逻辑CMOS系列电路。
A new three-valued logic (TVL) threshold gate circuit simple in structure and suitable for IC manufacturing is described. A three-valued t gate IC for multiple purposes is designed.
本文介绍了一种结构简单、适于集成化的三值“阈”门电路，并设计了一个多功能三值T门集成电路。
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