instruction-set architecture simulation
instruction-set architecture simulation
指令集架构仿真
以上为机器翻译结果,长、整句建议使用 人工翻译 。
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The co verification environment consists of an embedded software debugger and an embedded hardware simulator. It adopts instruction set architecture co simulation model.
该协同验证环境由嵌入式软件调试器和嵌入式硬件模拟器组成,其采用了指令集结构的协同模拟模型。
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