• Southwest Airlines' (LUV) managers, for example, train baggage and gate staff to know exactly what to do if planes are late or other problems arise.

    举例说,在美国西南航空公司 (Southwest Airlines),管理者需训练行李处和登机口的员工,帮助他们掌握飞机晚点或其他应急事件发生时的处理方法。

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  • The solution offers features including mobile check-in, mobile boarding passes, flight and gate status updates, frequent flyer account access, and special fares and offers.

    该方案提供了众多功能,包括手机值机、手机登机牌、航班和登机口状态更新、常旅客账户接入和特价机票显示。

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  • The living space and the sea and sky are visible through the entrance. Tall wall, straight gallery and gate. Infinite time, infinite space!

    从入口能一直看到起居空间以及远处的海天。高耸的墙壁,笔直的通道,挑立的大门。无尽的时间,无尽的空间。

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  • Install and secure the threaded rod and gate plate.

    将丝杠与闸板安装、紧固好。

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  • The runner and gate system must be designed to reduce the possibility of turbulence.

    浇道和浇口系统的设计必须能减少紊流的可能性。

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  • The energy optimization methods in circuit level and gate level have been investigated widely.

    线路层、门层等低层能量优化方法已经得到广泛研究。

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  • Besides filling duration, runner design and gate location matter a lot to flow balance as well.

    流道设计与进浇口位置除了关系到充填时间的长短,更直接影响充填是否平衡。

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  • It also has the advantage of preferable technique repetition and gate insulator deposition uniformity.

    在制作工艺方面具有更高的工艺重复性和栅介质淀积的均匀性。

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  • The surfaces of poly-Si thin film and gate oxide of thin film transistors were passivated using N2O/NH3 plasma.

    采用N2O和NH3等离子钝化技术对多晶硅薄膜表面和栅氧表面进行了钝化处理。

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  • Presented in the form of being without walls and gate, the campus exists in the form of mixing of the surrounding environment.

    校园在形态上呈现为没有围墙和大门,以一种融合的形式存在于周围的环境中。

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  • A rectangular wave generating circuit has been designed with MOSFETs, half bridge driver chip LM27222 and gate drive transformer.

    利用MOS管、半桥驱动芯片LM27222、栅极驱动变压器等器件,设计了变极性矩形波发生电路。

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  • The relations of impurity profile in the inversion layer and the maximum channel potential versus dose, width of SiO_2 and gate bias are analysed.

    分析了反型层的杂质分布、最大沟道电势与注入剂量、氧化层厚度和栅压等之间的关系。

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  • The effects of the filling velocity and gate shape and located position on semi-solid forming quality and flow patterns were investigated with simulation.

    对不同充填速度、浇口形状以及浇口设置位置下半固态成形过程进行模拟分析。

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  • The predicting field water level can be compared with the measured real time field water level and the pump and gate action can be controlled in the system.

    该系统可把预设农田水位与测得的农田实时水位进行比较,并据此控制闸门和水泵的动作。

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  • At the same time, gate entry velocity and gate dimension have great influence on the mold filling process, and high quality metal castings could be obtained …

    同时,内浇道充型速度和内浇道尺寸对压铸件充填过程影响很大,合理的设置可以减少涡流和卷气,得到高质量的压铸件。

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  • This paper analyses the blocking voltage, forward voltage drop, photoresist mask design and gate-triggering and dynamic characteristics of high-power thyristors.

    本文对大功率可控硅的阻断电压问题、正向压降问题、光刻掩模板的设计问题、控制极特性问题以及动特性问题进行了分析。

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  • A miniature shaping amplifier and gate integrator as well as its applications, operation principle, circuit structure and circuit design are introduced in this paper.

    提出了一种微型成形放大器和门积分器,简要介绍电路结构与电路设计,工作原理及技术指标。

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  • Its key idea is that integration of GTO with improved structure, antiparallel freewheeling diode and gate drive circuit, then connects its gate drive by low inductance.

    它的关键思想是将改进结构的GTO与反并联二极管和门极驱动电路集成在一起,再与其门极驱动器在外围以低电感方式连接。

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  • In the case of small opening, submerged discharge, and water-stop rubber damage, the interaction between water and gate may cause vibration which result in gate damage.

    在小开度、淹没出流情况下,如果止水橡胶损坏,水和闸门的相互作用将导致闸门产生破坏性的振动。

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  • Our work mainly focus on the improvements of reverse recovery charge and gate charge which impact much on high speed switching and high efficiency performance of a VDMOSFET.

    本项目主要针对影响器件开关速率和高效性能的反向恢复电荷、栅电荷进行优化和改进。

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  • A deep negative feedback operation amplifier used in band gap reference is a common source and gate folded cascade operation amplifier with a lower offset voltage and a higher gain.

    该带隙电压基准源电路中的深度负反馈运算放大器为低失调、高增益的折叠型共源共栅运算放大器。

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  • Sacrificial gate spacers are disposed on the sidewalls of the gate dielectric and gate electrode. Cavities are etched into the substrate extending under the sacrificial gate spacers.

    牺牲栅电极间隔物设置在所述栅极电介质和所述栅电极的侧壁上,在所述衬底上蚀刻空腔,并且空腔在牺牲栅电极间隔物下方延伸。

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  • Compared with synchronous explosive and gate, it requires no synchrony and time sequencing to its two inputs, thus extends its application area and improves its reliability of normal function.

    这种异步与门与常用的同步型爆炸与门相比,具有对两个输入信号无同步性和无时序要求的特点,扩展了与门的应用范围,提高了正常作用的可靠性。

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  • The phase detecting error caused by local oscillator frequency drift and non-synchronization of measurement signal and gate signal is eliminated and the measurement speed is improved at the same time.

    该方法可以有效的消除因本振信号频率漂移及闸门信号与被测信号的非同步引起的测相误差,同时提高了测量速度。

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  • Description: 5-input AND gate with 2x drive strength.

    中文描述:5输入与门的2倍驱动力量。

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  • With the FWM effect in nonlinear fibers, a novel high speed all-optical AND gate scheme is proposed.

    利用高非线性光纤的四波混频效应,提出了实现高速全光与门的新方案。

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  • So if these factors are controlled properly, the output performance of the logic AND gate can be effectively improved.

    合理控制这些因素,可以有效地提高该逻辑与门的输出特性。

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  • Using the device, the demonstrating and exploring experiments on logical circuit, which includes AND gate, NOT gate, OR gate, are illustrated.

    利用该实验仪做了与门、非门、或门基本逻辑电路的演示实验及探究实验。

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  • Original conditions: Use D flip-flop (74 LS 74), " and" gate (74 LS 08), " or" gate (74 LS 32), non-gate (74 LS 04), three binary mod 5 counter design.

    原始条件:使用D触发器( 74LS 74 )、“与”门 ( 74 LS08 )、“或”门( 74 LS32 )、非门 ( 74 LS04 ),设计三位二进制模5计数器。

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  • Original conditions: Use D flip-flop (74 LS 74), " and" gate (74 LS 08), " or" gate (74 LS 32), non-gate (74 LS 04), three binary mod 5 counter design.

    原始条件:使用D触发器( 74LS 74 )、“与”门 ( 74 LS08 )、“或”门( 74 LS32 )、非门 ( 74 LS04 ),设计三位二进制模5计数器。

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