The data acquisition system adopted TMS320LF2407A chip of ti as main controller, in addition, designed peripheral signal processing circuit, memory module, communication module and so on.
该数据采集系统采用TI公司的TMS320 LF 2407 A芯片为主控制器，另外设计了相应的外围信号调理电路、存储模块、通信模块等。
This terminal's hardware design mainly includes the choice of microprocessor chip, the interface design of MC35 module of communication, the circuit design of memory modules and serial port and so on.
该终端的硬件设计，主要包括微处理器芯片的选型、MC35通讯模块的接口设计、存储器单元及串口电路设计等。
Design the CAN bus address encoder, communication terminal digital display circuit, control relay circuit, LNK501 switching power supply chip circuitry.
设计了基于CAN总线的地址编码器，通信总站的数码显示电路，控制继电器电路，LNK501开关电源芯片电路。
IBM PC and single chip microcomputer communication hardware circuit, software interface and measure to improve reliability of communication.
IBMPC机与单片机通讯的硬件电路、软件接口以及提高通讯可靠性的措施。
They include signal sampling circuit, man-machine interface circuit and control circuit, main chip interface circuit, zero-crossing triggering circuit, and communication circuit, etc.
它们包括信号采样电路、人机接口电路、主控芯片接口电路、过零触发电路及通讯电路等。
Based on introduction of communication integrated circuit CSC5087, SC8870, the interface with singal chip computer and its application are presented.
在介绍通讯集成电路CSC5087和SC 8870的基础上，给出了与单片机的接口方法和应用。
Most single chip modems are designed and manufactured for the telephone circuit. It is only possible to realize point to point communication through one channel with these single chip modems.
大部分单片调制解调器芯片都是依据电话线路设计制造的，即在一条信道上只能实现点对点的通信。
The paper introduces an approach of serial communication of PIC16F877 single chip computers with PC and provides a hardware interface circuit and a communication source program.
介绍了PIC16F877单片机与PC机实现串行通信的一种方法，并给出了硬件接口电路及通信源程序。
The hardware structure is introduced, emphatically the communication interface circuit. The time sequence logic problem between CAN controller chip SJA1000 and AT91RM9200 is solved using the CPLD.
介绍了新型通信控制器的硬件设计，着重描述了通信接口部分，用复杂可编程逻辑器件CPLD解决了CAN 控制器芯片SJA 1000与AT 91RM 9200之间的时序逻辑问题。
The hardware structure is introduced, emphatically the communication interface circuit. The time sequence logic problem between CAN controller chip SJA1000 and AT91RM9200 is solved using the CPLD.
介绍了新型通信控制器的硬件设计，着重描述了通信接口部分，用复杂可编程逻辑器件CPLD解决了CAN 控制器芯片SJA 1000与AT 91RM 9200之间的时序逻辑问题。
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