In the new scheme proposed, the phase lock loop is avoided and the digital logical circuit is used.
该方案利用信号自身的特性，采用数字逻辑设计，有效避免了性能不高的锁相环的使用。
The circuit supply voltage is 3 ~ 18 v, suitable in logic level of kinds of digital logical circuits.
电路的电源电压为3 ~18V，适用于各种类型的数字逻辑电路的逻辑电平判断。
The module is made of high speed amplifier, AGC circuit, digital logical circuit, intensity modulator drive circuit, and intensity modulator.
该模块由高速前放电路，数字逻辑电路，强度调制器驱动电路，自动增益控制电路，以及强度调制器组成。
HDL is an essential general tool in digital logical circuit design. A HDL implementation of the integral bit synchronization with good performance is provided.
HDL是设计数字逻辑电路必不可少的通用工具，该文给出了位同步性能较好的积分型自同步的一个HDL实现。
The said digital gate circuit macro model can be used to perform a logical simulation for gate circurit and the digital circuit formed by the gate circuit.
提出了一种建立数字门电路宏模型的方法 ，采用该方法建立的门电路宏模型可以对门电路以及由门电路构成的数字电路进行逻辑仿真 。
Stable state trigger is core logical unit which has memory function and plays an important role in digital integrated circuit.
双稳态触发器是具有记忆功能的核心逻辑单元，在数字集成电路中发挥着重要作用。
This circuit may make a tri-state logic pen or is installed in the multimeter and the digital logical experiment box.
该电路可做成三态逻辑笔或装置在万用表、数字逻辑实验箱中使用。
The programmable digital devices implement the logical function by designed internal logic array block while the traditional digital systems do it by designed printed circuit block.
传统的数字系统通过设计线路板实现系统性能，而可编程器件是通过设计芯片内部的互联逻辑来实现系统功能。
The said digital gate circuit Marco model can be used to perform a logical simulation for gate circuit and the digital circuit formed by the gate circuit.
本文提出了一种建立数字门电路宏模型的方法，采用该方法建立的门电路宏模型可以对门电路，以及由门电路构成的数字电路进行逻辑仿真。
The said digital gate circuit Marco model can be used to perform a logical simulation for gate circuit and the digital circuit formed by the gate circuit.
本文提出了一种建立数字门电路宏模型的方法，采用该方法建立的门电路宏模型可以对门电路，以及由门电路构成的数字电路进行逻辑仿真。
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