The shift register is a sequential logical circuit, which can store and shift binary digit information.
移位寄存器是用来寄存二进制数字信息，并能将存储的信息移位的时序逻辑电路。
One-chip computer, logical circuit, audio frequency and video processor, Diode, Triode.
单片机，逻辑电路，音视频处理器，二、三极管。
In the new scheme proposed, the phase lock loop is avoided and the digital logical circuit is used.
该方案利用信号自身的特性，采用数字逻辑设计，有效避免了性能不高的锁相环的使用。
PAL chips, specially PAL22V10 or 22VP10. which have high performance', have been adopted widely in logical circuit design.
PAL器件，尤其是高性能的PAL22V10或者22VP10在最新的逻辑电路设计中广泛被采用。
This paper discusses the foundation and the application of reduced-dimension Karnaugh map in numeral logical circuit design.
文章介绍了在数字逻辑电路设计中降维卡诺图的建立和应用。
In the design of logical circuit, the simpler the logical expression is, the more economical is the realization of the circuit.
在逻辑线路的设计中，逻辑表达式越简单，线路实现时就越经济。
The module is made of high speed amplifier, AGC circuit, digital logical circuit, intensity modulator drive circuit, and intensity modulator.
该模块由高速前放电路，数字逻辑电路，强度调制器驱动电路，自动增益控制电路，以及强度调制器组成。
The method to get it can be used to simplify the proving process of some logic equations, as well as some design processes of logical circuit.
利用这种表示反函数的方法，可简化一些逻辑等式的证明过程，并可使一些逻辑电路的设计过程简化。
Using the device, the demonstrating and exploring experiments on logical circuit, which includes AND gate, NOT gate, OR gate, are illustrated.
利用该实验仪做了与门、非门、或门基本逻辑电路的演示实验及探究实验。
HDL is an essential general tool in digital logical circuit design. A HDL implementation of the integral bit synchronization with good performance is provided.
HDL是设计数字逻辑电路必不可少的通用工具，该文给出了位同步性能较好的积分型自同步的一个HDL实现。
It needs to have new ideas and ways in design to use Mid-scale integrate circuit to improve the Combined Logical circuit in engineering to meet the requirements of computerizing engineering design.
在工程实践中利用中规模集成电路设计组合逻辑电路需要在设计理念和方法上做一定的改进，以适应工程设计计算机化和工程实际的要求。
It needs to have new ideas and ways in design to use Mid-scale integrate circuit to improve the Combined Logical circuit in engineering to meet the requirements of computerizing engineering design.
在工程实践中利用中规模集成电路设计组合逻辑电路需要在设计理念和方法上做一定的改进，以适应工程设计计算机化和工程实际的要求。
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