Some restrictions apply in PCI (for example, PCI devices behind a PCIe-to-PCI bridge must be assigned to the same domain), but PCIe does not have this restriction.
PCI中有一些限制(例如，一个PCIe - to - PC i桥接器后面的PCI设备必须被分配到相同的域)，但PCIe没有这种限制。
Given what we already know about the device tree, we can start with the addition of the following node to describe the PCI host bridge.
既然关于设备树我们已经有所了解了，那么我们就从以下所示新增加的节点来介绍pci主桥。
The card is PCI add card, comprised with the core chip, a high density high capability FPGA, and the image collect chip, image output chip, PCI bridge chip and the DDR RAM.
该卡是以高密度高性能的FPGA芯片为核心，图像采集芯片、图像输出芯片、PCI桥芯片、DDR动态存储器等为辅助的PCI扩展卡。
Using PCI bridge chip S5933 to develop data pick card device driver is presented also.
还结合PCI桥芯片s5933开发了数据采集卡设备驱动程序。
In this article, to carry the 6-axis motion controller out, a method of using PCI special interface chip PCI9052 to be a interface bridge of PCI bus and DSP (TMS320LF2407), was introduced.
文章介绍了一种采用PCI专用接口芯片pci9052作为PCI总线与DSP (TMS320 LF 2407)的接口桥接器，实现6轴运动控制卡的硬件设计方法。
Introduce the PCI-AHB interface and PCI local bus operation, especially analyse the architecture of PCI-AHB bridge module.
对PCI -AHB接口和PCI总线操作进行了介绍，详细分析了PCI—AHB桥接模块的结构设计。
The limit can be broken with PCI-PCI bridge technology.
通过PCI - PC I桥接技术，能突破这一限制。
The paper presents all kinds of factors affecting the performance of the PCI-PCI bridge, and the methods of how to optimize the performance.
文中分析了影响PCI - PC I桥性能的各种因素，并提出了如何提高系统性能的方法。
A nontransparent PCI-PCI bridge is one of the key elements affecting the performance of the general audio processing platform.
非透明pci - PCI桥的性能是影响通用语音处理平台的关键因素之一。
This designing includes three parts: Multi-Inputs Video Collecting System based on PCI-PCI Bridge, Intelligent Keyboard designing and On-line Image Recognizing and Warning System.
本设计包括三个主要部分：基于PCI桥实现多路视频采集系统、智能键盘设计和在线图像识别报警算法。
South Bridge is an important unit of PCI.
南桥是PCI总线的重要部分。
PLX9054 is used as the PCI bus bridge chip.
使用PLX9054作为与PCI总线的接口芯片。
Limit Full bandwidth performance may not be achieved with more than one adapter per PCI Host Bridge (PHB) or more than one CPU.
限制全带宽性能可能无法实现一个以上的PCI主机适配器每大桥基丁酸酯(PHB)或一个以上的CPU。
Limit Full bandwidth performance may not be achieved with more than one adapter per PCI Host Bridge (PHB) or more than one CPU.
限制全带宽性能可能无法实现一个以上的PCI主机适配器每大桥基丁酸酯(PHB)或一个以上的CPU。
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