A digital clock is counting down to midnight.
巨大的数字时钟正在进行倒计时。
Another example in Listing 29 shows a digital clock.
清单29中的另一个例子显示一个数字时钟。
You'll see a display like that of Figure 1, a simple digital clock.
您将会看到类似于图1 所示的显示，即一个简单的数字时钟。
A digital clock on the wall shows the time in Afghanistan and Iraq.
墙上的数字时钟显示着阿富汗和伊拉克的两地时间。
我们有个数字钟。
Waterproof digital clock for competition and practice Settings.
防水型数显时钟，用于竞赛和训练场合。
Dynamic digital clock displaying month, date, year, hour, minute and second.
动态数字时钟显示月，日，年，小时，分钟和秒。
This paper discusses the design and implementation of a low-power digital clock chip.
本文讨论了一种低功耗时钟芯片的设计与实现。
A device used to develop a time base for calculations and control e. g. a digital clock.
一种用于产生计算和控制用时基的装置，例如数字钟。
A device used to develop a time base for calculations and control, e. g., a digital clock.
一种用于产生计算和控制用时基的装置，例如数字钟。
Then, at seven minutes and 56 seconds, the digital clock froze because technicians decided not to proceed.
倒数计时的数字表定格在7分56秒。工程技术人员决定推迟发射。
One patient reported that she was newly able, about a year after the treatment, to see the digital clock in the family car.
一名患者报告说，在接受治疗约一年后，她最近能看清她家车上的数字钟了。
The paper introduces the design of digital clock based on FPGA and VHDL, the time of clock can be displayed with the digital driving circuit.
介绍了利用VHDL硬件描述语言结合FPGA可编程器件进行数字钟的设计，并通过数码管驱动电路动态显示计时结果。
This text is mainly to introduce a method of making the multi-functional digital clock with Single-Chip Microcomputer AT89C51 as the center controller.
本设计基于单片机技术原理，以单片机芯片AT89C51作为核心控制器，通过硬件电路的制作以及软件程序的编制，设计制作出一个多功能数字时钟系统。
This paper introduces hardware constitution and software design of digital clock controlled by 8031 single-chip microcomputer, and its assembly language program is given.
介绍了用8031单片机控制的电脑数字钟的硬件结构与软件设计，给出了汇编语言源程序。
The utility model is composed of a time signal circuit, a digital clock circuit, a time display screen, a semiconductor memory, a programming circuit and an executing circuit.
本实用新型由时基信号电路、数字钟电路，时间显示屏，半导体存贮器，编程电路及执行电路组成。
The performance of the analog circuit is difficult to satisfy the need, such as the analog pll can't satisfy the requirement of noise restrain in digital clock extracting circuit.
模拟电路的性能难以满足需要，例如，在支路时钟恢复电路中，模拟锁相环难以满足噪声抑制要求；
Combining the Constructivism Ideology and taking the case of digital clock design, this paper presents the Application of Constructivism Ideology in Embedded System course teaching.
结合嵌入式系统课程的特点，并以数字时钟的设计为例，介绍了将建构主义教学理论应用于嵌入式系统课程教学。
This paper introduces the process of logic design of digital circuits, and mainly explains the function of asynchronous counter and decoder. The digital clock is an example of this application.
本文介绍了数字电路系统的逻辑设计过程，并且着重阐明异步计数器和译码器的功能，数字钟是这方面应用的一个实例。
This paper introduces the process of logic design of digital circuits, and mainly explains the function of asynchronous counter and decoder. The digital clock is an example of this application.
本文介绍了数字电路系统的逻辑设计过程，并且着重阐明异步计数器和译码器的功能，数字钟是这方面应用的一个实例。
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