This thesis gives the full IC design flow.
本论文基本体现了集成电路设计的完整流程。
The IC design method base on RTL has been widely used.
集成电路设计在寄存器传输级的设计方法已经非常成熟。
Deep submicron IC design will bring many new challenges.
深亚微米芯片设计的会带来许多新的挑战。
BCD processes are widely used in analog IC design field since its invention.
BCD工艺自问世以来就被广泛应用于模拟IC设计的各个领域。
This is a postgraduate thesis focused on the Heat Meter for IC design, as well.
这是一篇硕士研究生论文，主要探讨了用于IC热量表的设计，内容较好。
By using this new technique, some new area of IC design verification is opened.
这一技术尝试，为集成电路的设计验证开辟了新的领域。
Functional verification is an important bottleneck in millions gates IC design.
功能验证是百万门级IC设计中的一个重要瓶颈。
As the digital IC design scale is increasing, lower power becomes increasingly important.
随着数字集成电路(IC)设计的规模不断增加，降低功耗变得愈加重要。
My company is a professional IC design agent and technology development in the enterprise.
我公司是一家集IC 专业代理和技术开发设计于一体的企业。
The nonlinear behavior of the multi-tanh principle used in CMOS IC design is investigated.
研究了CMOS电路中多双曲正切法则的应用对线性度产生的影响。
This paper first discusses the design methodology of analog IC, namely, analog IC design flow.
本文首先讨论了模拟集成电路的设计方法学，即模拟集成电路的设计流程。
This paper presents an IC design and use method of LCD controller and driver with embedded RAM.
讨论一种液晶控制驱动器的设计及使用方法。
The Company since its inception, is committed to the development and sale of IC design industry.
本公司自成立以来，致力于IC设计开发及销售行业。
As an IEEE test standard, JTAG is accepted and used by many IC design companies and manufacturers.
JTAG作为测试标准已为芯片设计与制造厂商接受和应用。
Texas Instruments (TI) is a global analog and digital semiconductor IC design and manufacturing company.
模拟，半导体，数字信号处理-德州仪器。
The continuous decreasing of cost, size and power dissipation is the develop trend of IC design nowadays.
芯片尺寸、功耗的不断减少和芯片成本的不断降低是集成电路设计的基本目标。
Interconnect wire delay is a very important question that must to be resolved in deep submicron IC design.
深亚微米集成电路的互连线延迟是设计中需十分重视并必须解决的问题。
A measuring system for the eye movement signal based on the infrared TV method and its IC design are discussed.
讨论了一种基于红外电视法的眼动信号测量系统及其芯片设计。
At present, only a small number of IC design teams can be found in certain big companies and in fabless design houses.
现时只有一些大型公司及无晶圆设计公司内设有集成电路设计小组，但为数不多。
The rapid progress of semi-conductor technology on deep sub-micro and nanometer scale announces the SOC era of IC design.
深亚微米和纳米级的半导体技术迅速进步，使得集成电路的设计已经进入系统集成芯片时代。
IC design and manufacturing are not independent any more, therefore a lot of design for manufacturability issues are caused.
在电路尺寸达到纳米量级的今天，设计与工艺的独立性被打破，引发了一系列可制造性设计问题与相关研究。
With the increase of manufacturing level and design scale, verification has become on of the major bottlenecks of IC design.
随着IC制造水平的提升和设计规模的增大，验证成为了IC设计的主要瓶颈之一。
Chip verification, especially functional verification has become one of the most difficult and challenging issues in IC design.
芯片验证，尤其是功能验证已成为当前集成电路设计中最困难、最具挑战的课题之一。
This IC design system applicable to the standard cell method is an automatic layout system used for designing Application Specific ICs (ASIC).
采用标准单元方法的集成电路设计系统是一个用于专用集成电路(ASIC)设计的自动布图系统。
The paper gives the trimming technology's theory and realization in precision IC design, and sums up the advantage and disadvantage of methods.
介绍了高精度集成电路设计中修调技术的原理与多种实现方法，总结各种实现方法的优缺点。
Under pressure of the increase of chip scale and the decrease of timing to market, verification has become the bottleneck of digital IC design.
在芯片规模指数式上升和要求面市时间快速缩短的双重压力下，验证已成为数字集成电路设计的瓶颈。
Under pressure of the increase of chip scale and the decrease of timing to market, verification has become the bottleneck of digital IC design.
在芯片规模指数式上升和要求面市时间快速缩短的双重压力下，验证已成为数字集成电路设计的瓶颈。
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