The cache can easily scale to 40 GB, which can be spread across multiple machines, so the whole cache can be in memory, with minimal access time.
缓存可以轻松扩展到40GB，可在多台机器上分布，因此整个缓存可以位于内存中，只需要很少的访问时间。
Applications that are processor intensive and access memory frequently will benefit the greatest since NUMA decreases the time it takes a processor to access a region in memory.
使用处理器较多而且频繁访问内存的应用程序将最为受益，因为NUMA减少了某个处理器访问内存中某个区域的时间。
Applications that are processor intensive and access memory frequently will benefit the most since NUMA decreases the time it takes a processor to access a region in memory.
处理器密集型和内存访问频繁的应用程序将获得最大收益，因为NUMA减少了处理器访问内存区域的时间。
Memory is the best persistent store for a cache because access time is (practically) instantaneous and RAM is typically plentiful (or cheap to amass).
内存是缓存的最佳持久性存储，因为访问时间(实际上)是即时的并且RAM的容量通常都很大(或者容易聚集在一起)。
Therefore, the amount of time required for any particular memory access is completely unknown (if the memory is swapped out, who knows how long it will take).
因而，某一内存访问所需的时间是完全未知的(如果内存被换出，所需时间的长短是不可知的)。
Caching minimizes the amount of time it takes to access the data. Most modern processors have three classes of memory.
缓存可以显著减少访问数据花费的时间。
A hacker could perform a memory dump at the right time and then gain access to this sensitive data.
黑客则会在适当的时刻，将内存中的信息转储出来，进而成功地访问这些敏感数据。
We've also presented and explained how to use several powerful new features, such as revalidation in memory and access to type information — something developers have been asking for for a long time.
我们还展示并解释了如何使用几个强大的新特性，例如内存中的重新验证以及对类型信息的访问——这些都是开发人员长期以来梦寐以求的特性。
You could consider these "thread-local" copies of variables to be similar to a cache, helping the thread avoid checking main memory each time it needs to access the variable's value.
您可以将变量的这些“线程局部”副本看作是与缓存类似，在每次线程需要访问变量的值时帮助它避免检查主存储器。
This input/output (I/O) operation is time-consuming, compared with the amount of time required to access data that’s already in computer memory.
与访问已经在计算机内存中的数据相比，这种输入/输出 (I/O)操作非常耗时。
McObject boasts with a very small database engine core of about 5,000 lines, and the run-time needs between 30k and 300k of memory depending on access pattern.
这个数据库引擎非常精悍，只有约5000行代码，McObject对此感到骄傲。根据访问模式不同，运行时需要30K到300k的内存。
The idea is to make this class as easy as possible to use, while making it efficient in terms of memory and access time.
这一想法使得这个类尽可能易用，同时在内存和访问时间上也保证了高效。
Even though time needed for one memory access is quintupled, caching permits performance to remain reasonable.
尽管每次内存存取的时间是很大的，高速缓存使执行的时间还是可以接受的。
In the design of a dynamic memory, as the variety and number of interconnections are increased, the access time is improved significantly.
在动态存储器的设计当中，增加内联结构的种类和数量，可以使存取时间加快。
Generally, the memory hierarchy follows the access time with the fast CPUregisters at the top and the slow hard drive at the bottom.
一般来说，内存层次结构如下的访问时间与快速的CPU寄存器顶部和缓慢的硬盘驱动器在底部。
Retrieving the related information may enhance their memory of it, helping them to access that information at a later time.
对相关信息的追忆可能增强了对其的记忆，这样就有利于以后能够获取到这一信息。
Via the technology, optical memory can overcome some limits and reach higher density and shorter access time.
通过此技术，光盘存储可以突破原有局限，实现更高的存储密度和更快的存取速度。
A memory allocation algorithm was developed to maximize parallel data access and make full use of CPU processing ability to improve real-time performance of embedded multimedia applications.
为了提高嵌入式多媒体应用的实时性能，提出了一种最大化数据并行访问以便充分发挥CPU处理能力的片上存储器分配方法。
A fast access time is achieved by using six-transistor CMOS memory cell, latched sense amplifier, and high-speed decoder circuit.
存储器采用六管CMOS存储单元、锁存器型敏感放大器和高速译码电路，以期达到最快的存取时间。
Substation automation system USES memory database for real-time data access.
变电站自动化系统需要使用内存数据库对实时数据进行存取。
In a computer using the Harvard architecture, the CPU can both read an instruction and perform a data memory access at the same time, even without a cache.
在使用哈佛架构的计算机中，即使没有缓存，CPU也可以在读取指令的同时进行数据访问。
The access patterns to system memory and graphics local memory are averaged because there is no time-based sequential pattern to make them exact.
对系统存储器和图形本地存储器的访问模式是平均的，因为没有使它们准确的基于时间的顺序模式。
The reason that this process takes so long is that a computer's operating system must be loaded from its hard disk into its random-access memory (RAM) every time the machine is turned on.
这个过程花这么长时间的原因是，每当打开计算机时，计算机的操作系统必须从硬盘载入到随机存取存储器(RAM)。
Decoder is one of the most important components in a memory unit, and its improvement can greatly diminish the access time of both register file and SRAM.
译码器是存储部件关键路径的重要组成部分，提高译码速度能有效提高寄存器文件和SRAM的读写速度。
Another unique architectural feature is the memory system which allows an instruction fetch and at the same time a data access by each individual core at every single clock cycle.
另一个独特的构架特性是内存系统，它允许一个取指，并在同一时间，每一个核可以读取数据在每一个单独的时钟周期内。
DMA (Direct Memory Access) technology is one of the best solutions which could meet the requirements of real-time and accuracy for information processing.
在此前提下，采用高速数据传输技术成为必然，DMA(直接存储器访问)技术就是较理想的解决方案之一，能够满足信息处理实时性和准确性的要求。
This paper discusses the judgement and process of program derailment, and presents fault tolerance methods in random access memory, I/O canal and data in computer real-time control system.
本文提出了在计算机实时控制系统中，程序飞出的判断及其处理方法；提出了随机存贮器的容错方法，I／O通道的容错方法以及数据的容错方法。
This paper discusses the judgement and process of program derailment, and presents fault tolerance methods in random access memory, I/O canal and data in computer real-time control system.
本文提出了在计算机实时控制系统中，程序飞出的判断及其处理方法；提出了随机存贮器的容错方法，I／O通道的容错方法以及数据的容错方法。
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