The FPGA was used as a coprocessor for image acquisition and pre-processing.
FPGA作为协处理器完成图像的采集和预处理。
The ICA device is modeled after the shallow firmware mode of the 4758 Coprocessor.
ICA设备是照4758Coprocessor的shallow固件模式建模的。
A new address generator of the embeded SIMD coprocessor is introduced in this paper.
文章介绍了一种新的嵌入式SIM D协处理器地址产生器。
A GPU is a hardware coprocessor that accelerates computations for computer graphics applications.
GPU是一种硬件协处理器，可加速计算机图形应用程序的计算。
This paper designs a RSA crypto-coprocessor based on the research of RSA cryptographic algorithm.
本文在对RSA密码算法研究的基础上，进行了RSA密码处理器的设计。
1performed An invalid arithmetic operation. | % 1encountered An error in its use of the math coprocessor.
1执行了非法运算。| % 1使用数学协处理器时出错。
In order to accelerate the speed of data exchange, often with embedded RSA algorithm coprocessor, and other.
为了加快数据交换的速度，往往还拥有内嵌的RSA算法协处理器等。
IIT began as a fabless vendor of semiconductor products for the math coprocessor and graphics chipset markets.
印度理工大学的一开始是无晶圆厂的半导体产品供应商的数学协处理器和图形芯片组市场。
In order to improve the performance of the coprocessor, a new passing way of the address generator is designed.
为了提高协处理器的性能，地址产生器中设计了新的传送路径。
AT89C52 is used as coprocessor to achieve the control of system and the data exchange of the flight parameters.
而AT 89 C52作为协处理器，完成系统的控制和串口飞参数据的交换。
The address generator mainly implements the address calculation and instruction-field extraction of the coprocessor.
该地址产生器主要完成地址计算和协处理器指令的场抽取功能。
The area and speed of cryptography coprocessor impede the application of public-key cryptography RSA for smart card.
密码协处理器的面积过大和速度较慢制约了公钥密码体制RSA在智能卡中的应用。
Single chip microcontroller 8396 and the chip LAN coprocessor 82586 are incorporated to implement the network protocol.
此竞争总线网络协议是采用单芯片微控制器8396和LAN处理器芯片82586的连接技术实现的。
A novel16fixed point embedded SIMD array coprocessor which is used to solve low image comprehension is described in the paper.
论文介绍的SIM D协处理器是用于低层图像理解的16位定点嵌入式阵列处理器。
An approach of Micro program Controller design for coprocessor is put forward and a test bench is given to verify its function.
在微程序控制器的设计中提出一种协处理器微程序控制器的设计方法，并且给出其功能验证的测试平台。
The components are modules that construct the reconfigurable cipher coprocessor, and the structure is their connection network.
可重构密码协处理器组成与结构是指可重构密码协处理器的组成模块及其相互之间的连接网络。
This paper forwards a hardware solution based on NP and coprocessor which could be used in matching and lookup in application layer.
文章提出了一种基于网络处理器及应用层匹配查找协处理器的硬件解决方案，来实现高速网络环境的入侵检测。
The executing of the microcode function of the microprogram controller is very crucial to the instructions decoder in the coprocessor.
在协处理器中，微程序控制器的微码控制是协处理器指令译码的控制核心。
This paper presents an embedded monocular vision system for object tracking in real time with coprocessor architecture based on DSPand FPGA.
提出了一套基于DSP/FPGA的协处理器结构用以实现实时目标跟踪的嵌入式视觉系统。
The control interface module shields the various differences of the main processor, which improves the portability of the coprocessor system.
通过系统中控制接口模块接收主处理器发送的控制指令，屏蔽了不同主处理器之间的差异，增强了系统的可移植性。
High-Speed Floating-point Adder is a critical part in the coprocessor, which is attached to the computing basis of floating-point instructions.
浮点加法器是协处理器的核心运算部件，是实现浮点指令各种运算的基础，其设计优化是提高浮点运算速度和精度的关键途径。
At last, a new technique that PLD as a coprocessor works together with DSP chip in the complex data processing of intelligent fuze is put forward.
最后，提出了在人工智能引信复杂数据处理任务中PLD作为协处理器与DSP处理器结合使用的新的技术途径。
But what if the market-based arguments against AMD's coprocessor plans were nullified? This is exactly what would happen if AMD were to acquire ATI.
但如果市场派反对amd的协处理器计划的观点立不住脚，那会怎么样？那也正是如果AMD收购AT I成功将会出现的结局。
Based on the reconfigurable computing system, the thesis proposes RAC, a reconfigurable array coprocessor model, targeted at multimedia image applications.
本论文基于可重构计算系统提出了针对多媒体图像处理的可重构阵列协处理器模型RAC。
The block cipher coprocessor has been applied in a PCI-FPGA cipher card designed by the Information Security Technology Laboratory of Guangzhou University.
分组密码协处理器现已成功的应用到了广州大学信息安全技术实验室研制的PCI - FPGA密码卡中。
Considering the marketing requests for reducing the low cost of the processor, this paper optimizes the executable solution for the RSA crypto-coprocessor.
在总结前人的算法的基础上，充分考虑了处理器大规模应用的低成本要求，提出了可行的RSA密码处理器的算法解决方案。
Secondly, we developed the coprocessor TMS320LF2407A to increase the management and the control of the taboret motor and the principal axis and some others.
研制了基于TMS320LF2407A为内核的协控制系统，设计了绣筐电机和主轴电机等硬件控制模块。
The SPARC T3-2 and T3-1 servers with on-chip cryptographic acceleration eliminate the need for additional coprocessor cards, special licensing, of add-on components.
具有片上加密加速功能的SPARCT3-2和T3-1服务器消除了对于附加组件额外协处理器卡和特别许可的需求。
In this process, a unique parallel video processing architecture combined with SIMD and pipeline MISD is proposed. Modules within the coprocessor are designed individually.
该设计提出了一种将常用的并行SIMD结构与流水线MISD结构相结合的新颖并行视频处理体系结构形式。
In this process, a unique parallel video processing architecture combined with SIMD and pipeline MISD is proposed. Modules within the coprocessor are designed individually.
该设计提出了一种将常用的并行SIMD结构与流水线MISD结构相结合的新颖并行视频处理体系结构形式。
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