When a satellite loses pointing, the data path through the satellite can be lost, as well, resulting in loss of revenue.
当卫星丢失指向时，通过卫星的数据路径就会丢失，从而导致收入减少。
In this paper, the data path of a high performance reconfigurable DSP processor is introduced.
介绍了高性能定点可重构DSP处理器的数据通路设计。
This paper discusses data path design of LS - DSP, which consists of ALU , Multiplier , Address Generator .
本文讨论LS—DSP数据路径的设计，即ALU、乘法器、数据地址产生器三大功能单元的设计。
A resistive load placed at the end of a cable to prevent data signals from reflecting back into the data path.
终结器就是置于电缆终端的一个电阻负荷，用来防止数据信号又反射回到线路中去。
An authenticator function is informed on the location of a data path function after a handover has taken place.
在发生切换之后，向认证器功能通知数据路径功能的位置。
The second iteration might push the design down to identifying all of the modules and the inter-module data path mechanisms.
第二个迭代则可能继续推动设计，来鉴别所有的模块和模块间的数据交换机制。
A cache server sits directly on the data path between the clients and the remote Web sites and intercepts all outgoing requests.
高速缓存服务器直接位于客户机和远程网站之间的数据路径上，并中途截取所有外发请求。
This paper starts from the general purpose DSP, of which architectural features and data path design methodologies are discussed.
本论文从通用的数字信号处理器出发，讨论了其体系结构和数据通路设计上的特点。
The discussions include the design of multiplier, ALU and serial port; almost cover all the important aspect of the data path design.
分别对乘法器、ALU和串口的设计进行了讨论，几乎覆盖了数据通路设计的各个方面。
This paper reports the network topology, structure of optical node, data path, control of data path sublayer in MAC and data buffering technologies.
本文报告了该实验网络的拓扑、节点结构、数据通道、MAC层的数据通道控制子层以及所使用的光缓存技术。
This paper describes in general the data path of digital computer sestem DJS200/10 and provides the performance parameter of different parts of model 10.
本文概括地描述了DJS200/10型数字计算机的数据通路，并给出其各部分有关的性能参数。
Because data frames arrive in term of time slot for the communication interface integrated chips, the pipeline data path is an effective optimization method.
对于通信接口芯片设计，数据帧依照时间顺序依次到达，因此，采用流水线数据通道对帧数据进行处理是有效的优化方法。
For example, a register associated with a LUT and that is not needed in the read data path in user RAM mode can be used to register data for writing in user RAM mode.
例如，与LUT相关而且在用户RAM模式的读数据路径中不需要的寄存器可被用于寄存用户RAM模式中用于写的数据。
By means of Lagrange multiplier method, this method distributes the slack to the operator nodes in the data path, thus, efficiently reduces the energy consumption of design circuit.
应用拉格朗日乘数法，将空闲时间分布到数据通路的各个操作节点上，从而有效地降低了设计电路的能耗。
Finish the design of data path, including adder, shifter, ROM and the control logic of the rotation, and optimize these parts in terms of the requirement of Longtium C2 microprocessor.
完成超越函数实现的数据路径设计，主要包括加法器、移位器、常数rom和旋转控制逻辑，同时针对“龙腾”C2微处理器的性能要求对各个部件进行优化设计。
A novel method of asynchronous data-path performance analysis is described.
介绍了一种新型的异步数据通路性能分析方法。
This method is based on multi-delay modeling, SPICE and logic simulation. It provides an effective tool to design and analysis asynchronous data-path.
这种方法在进行性能分析时基于多延迟模型、SPICE和逻辑仿真，可以作为异步数据通路设计和分析的一种有效工具。
Experimental results showed that the number of required functional unit in data-path obtained by this algorithm is decreased 41% in average and the running speed is improved 50% in average.
根据实验结果，该算法得到的数据通道中所需功能单元平均减少了41%，同时执行速度加快了50%。
As test has indicated, by Data-path offload, the TOE system can remarkably reduces the utilization of host CPU.
测试表明：TOE系统通过数据路径卸载显著降低了主机CPU的占用率。
As test has indicated, by Data-path offload, the TOE system can remarkably reduces the utilization of host CPU.
测试表明：TOE系统通过数据路径卸载显著降低了主机CPU的占用率。
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