As a digital logic design engineer, a problem of designing a finite state machine is often met.
作为一个数字逻辑工程师，经常会碰到设计一个有限状态机的问题。
The course requires extensive use of VHDL for describing and implementing digital logic designs. 6.111 is worth 12 Engineering design Points.
这课程需要使用VHDL去描述和执行数字逻辑设计。6.111价值12个工程设计学分。
Digital ASIC front-end design and verification methods is used in digital logic part design.
数字逻辑部分的设计采用数字asic的前端设计及验证方法。
The thesis discusses on how to research and then design the LED video panel system, which is a typical product of computer digital video system, by using the PLD chip as the main control logic.
本论文讨论用PLD芯片作为主要控制逻辑来设计计算机数字视频系统的一个典型应用型产品——LED视频电子显示屏系统的研制方法。
The design method of LED big screen scanning circuit is introduced, and the virtues of programmable logic device application on high-speed digital system are presented.
介绍了LED大屏幕扫描电路的设计方法，阐述了可编程逻辑器件在高速数字系统应用中的优点。
A technique to design a fuzzy controller by using digital logic circuits is proposed.
提出了一种用数字逻辑电路设计模糊控制器的方法。
After the system-level spec and the division of the design hierarchy are comfimed, we start to design the digital logic circuit from the bottom for the pixel machine .
在明确了系统级的总体规划以及设计层次的划分以后，我们从系统的最底层开始进行数字逻辑电路的设计。
This dissertation focuses on the high performance digital circuits design and relative issues, using the concept of logic balance.
本文结合工程背景，运用逻辑平衡的思想对高速数字电路的设计及相关问题进行了全面的研究。
Complex Programmable Logic Device (CPLD) is one of Application Specific Integrated Circuit (ASIC) that has been widely used, especially adapt to design digital system.
复杂可编程逻辑器件(CPLD)是目前应用最为广泛的可编程专用集成电路(ASIC)之一，特别适合于数字系统的设计和开发。
It is proved that this type of counter has correct logic function according to EDA simulation and experimental verification with FPGA and can be normally used in the design of digital system.
经eda软件模拟仿真和FPGA硬件验证，表明该计数器具有正确的逻辑功能，能够正常地应用于数字系统的设计。
Mixed logic convention has proved to be a very useful tool in digital design, however, it has not been emphasized enough in textbooks so far.
实践证明，在数字设计中混合逻辑体制是一种非常有用的工具。
Firstly, the thesis presents the system scheme of digital image compression based on PDVQ. Then we introduce the hardware design, FPGA logic realizing and FPGA implement of image processing algorithm.
本文首先给出了基于PD VQ的数字图像压缩系统的系统方案，然后介绍了系统的硬件结构设计、FPGA逻辑实现以及图像处理算法的FPGA实现。
In system digital part design, all outer logic circuits of Single chip microcomputer are implemented in CPLD. That makes the volume of the system smaller and improve the reliability of system.
在系统数字部分的设计中，采用CPLD来实现单片机外部的逻辑电路，大大缩小了整个系统的体积提高了系统的可靠性。
The feature of rapidly develop, high speed and high reliability of Complex Program Logic Device(CPLD) makes CPLD playing a more and more role in the design of digital system.
大规模可编程逻辑阵列（CPLD）的快速开发、在系统编程以及高速可靠的特点使得CPLD在数字系统的构建中起到越来越重要的作用。
This paper introduces the process of logic design of digital circuits, and mainly explains the function of asynchronous counter and decoder. The digital clock is an example of this application.
本文介绍了数字电路系统的逻辑设计过程，并且着重阐明异步计数器和译码器的功能，数字钟是这方面应用的一个实例。
We implement the tools of digital design early in the conceptual phase, to help us rebuild the logic of space and translate the folding of the circulation flows into a folding of space itself.
我们早期使用了数字化设计工具，来帮助我们重建空间逻辑和解析扭曲空间中的扭曲流线。
The digital logic chip of the invention and the method of design for testing can realize the observation of circuit scanning test by adopting few pins.
本发明的数字逻辑芯片及其可测试设计的方法，能够通过少量管脚实现电路在扫描测试时的可观测。
To shorten the distance between theory and practice, improve the ability of flexible application of digital components, logic circuit design is proposed combination of the fifth step.
为缩短理论与实践的距离，提高灵活应用数字元器件的能力，提出了组合逻辑电路设计的第五步。
Now, many digital logic systems cannot do without computer aided design CAD, especially the VHDL Hardware Description Language.
数字逻辑系统的设计离不开计算机辅助设计CAD工具的帮助，尤其是VHDL硬件描述语言。
FPGA is used to achieve the complex and high-speed logic control and the design of time sequence, with grabbed digital video signal cut and stored in SRAM, under the principles of the video signal.
利用FPGA完成复杂且高速的逻辑控制及时序设计，将采集的图像根据视频信号原理进行裁剪并存储在SRAM中。
The practice shows that this method can save a lot of FPGA resources, which just need over 100 LE logic unit to effectively solve the FIR digital filter design algorithms in FPGA resource issues.
实践表明，此方法可以节省大量的FPGA资源，仅仅需要100多个LE逻辑单元，就可以有效解决FIR数字滤波器算法在FPGA设计中资源紧张的问题。
In exploitation and design of the modern digital electronic system, programmable logic device (PLD) is used more and more widely.
现代数字系统开发设计中，可编程器件的使用越来越普遍。
A textbook, Analysis and Design of Digital Logic Circuit is compiled, matched with multimedia courseware and the teaching is conducted in multimedia cl...
组织编写了新教材《数字逻辑电路分析与设计》，制作了与教材配套的多媒体课件并用多媒体教室授课。
The application of this method is done and is illustrated in this paper through a practical design of a control logic for a three phase analog-digital con...
本文通过对三相积分式数模转换器控制逻辑的设计来说明这种设计方法。
The application of this method is done and is illustrated in this paper through a practical design of a control logic for a three phase analog-digital con...
本文通过对三相积分式数模转换器控制逻辑的设计来说明这种设计方法。
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