• The EBCOT design USES parallel processing and dynamic memory control (DMC) architecture, which greatly speeds up the coding process and achieves higher hardware utilization.

    EBCOT采用并行运算动态内存控制(DMC)结构保证编码速度的前提下,最大限度减小了片内小波系数缓存量和访问频率。

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  • The design of the hardware platform adopts the Helmholtz configuration, this parallel mechanical architecture solves the problem that motors is the load for each other.

    硬件平台设计采用霍尔姆结构这种平行机械结构解决了电机互为负载问题

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  • This paper presents a plan for the architecture of a parallel database machine based on the special hardware, SADM.

    本文提出一种基于专用硬件并行数据库体系结构SADM方案。

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  • This thesis achieves the following three innovative results: 1 the thesis presents a new parallel array 2-d discrete wavelet transform DWT hardware architecture based on lifting schemes.

    以下本文三个创新性成果1设计了并行阵列式二维离散小波变换DWT提升格式的硬件结构

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  • In this paper, a hardware-oriented, full pass-parallel coding architecture is presented, based on only one scanning window. This architecture is verified on FPGA.

    该文设计种适用硬件实现的单窗口通道并行编码结构,目前已通过FPGA验证

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  • After the detailed analysis of EBCOT algorithm and pass-parallel coding technique, a dual context window bit-parallel coding method and its architecture for hardware implementation are proposed.

    通过研究EBCOT编码原理通道并行算法编码过程,提出上下文窗口位并行的EBCOT系数位建模方法详细说明了使用算法的系数位建模系统的硬件结构

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  • Neural network possesses many of advantages : simple structure, easy implementation in hardware, the basic parallel computational architecture, etc.

    人工神经网络特点是:结构简单、能够大规模并行容易硬件实现

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  • According to the structure of Quasi-Cyclic LDPC code, we can make a trade-off between hardware complexity and decoding throughput by applying semi-parallel architecture.

    利用准循环ldpc结构特点,使用半并行结构的译码可以实现复杂度译码速率的有效折中。

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  • The algorithm has lower complexities and good parallel architecture, and is suitable for the high-speed low-power hardware realization and real-time processing.

    算法复杂度并行性支持高速功耗硬件实现,能实现空间数据的实时处理,在空间探测领域具有良好的应用前景。

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  • The algorithm has lower complexities and good parallel architecture, and is suitable for the high-speed low-power hardware realization and real-time processing.

    算法复杂度并行性支持高速功耗硬件实现,能实现空间数据的实时处理,在空间探测领域具有良好的应用前景。

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