The use of phase-locked loop technology makes the sampling frequency synchronously follow the signal frequency and improves the calculation accuracy of sampling data.
运用锁相环技术使采样频率同步跟踪信号频率，提高采样数据计算的准确性。
This paper presents a simple tracking filter circuit, which is applicable to Doppler radar sets and consists mainly of a switched bandpass filter and a phase-locked loop.
本文提出一种简单的跟踪滤波器电路，该电路可用于多普勒雷达，主要由开关式带通滤波器和锁相环组成。
It USES a high precision digital phase-locked loop (PLL) to accurately recover the Synchronous reference information of raw cloud-cover image data collected by the geostationary satellite.
它用高精度数字锁相环，精确地恢复地球同步气象卫星采集的原始云图数据的同步基准信息。
A fast all digital phase-locked loop with automatic modulus control is presented.
提出了一种具有自动变模控制的快速全数字锁相环。
This paper discusses an all digital phase-locked loop with a zero-crossing detector and a loop filter.
本文讨论的全数字锁相环包括过零检测器和环路滤波器。
The design of precise position tracking loop for DRTS with fast digital phase-locked loop is described.
本文提出一种用于光盘径向伺服系统的带有快速数字锁相环的精密位置跟踪环路的设计方案。
In phase-coherent communication system, phase-locked loop is always used to yield coherent reference signal.
相位相干通信系统中，通常采用锁相环路来产生相干参考信号。
FIG. 1 illustrates an example of a phase-locked loop (PLL) that can include techniques of the present invention.
图1图示说明可以包括本发明技术的相锁环(PLL)的示例。
According to the theory of phase-locked loop, we use reflected photoelectric sensor to carry out the color recognition.
根据锁相环的原理，使用反射式光电传感器实现了系统的颜色识别。
The paper studies digital control scheme of resonance inverter frequency-tracking based on all digital phase-locked loop.
本文主要研究了基于全数字锁相环的谐振型逆变器频率跟踪的数字化控制方案。
The paper introduces a kind of clock recovery system based on phase-locked loop with bi-directly incident phase-comparator.
介绍了一类基于双向输入型鉴相器锁相环技术的时钟恢复系统。
The possibility of using this kind of phase-locked loop under noise interference and the problems of filter design are discussed.
文中还讨论了在噪声作用下采用这种环路的可能性和滤波器的设计问题。
Project 1 will be focused on the design and SPICE simulation of a high speed frequency divider for phase-locked loop applications.
专题1主要是讨论用于相锁迴路应用的高速分频器设计和SPICE模拟。
We present a design for an adaptive gain phase-locked loop (PLL) that features fast acquisition, low jitter, and wide tuning range.
提出了一种快捕获，低抖动，宽调节范围的增益自适应锁相环的设计。
The industrial grating signals can be digital frequency multiplication with a phase-locked loop (PLL) controlled by a microcomputer.
用微型计算机控制锁相环(PLL)可对计量光栅信号进行数字倍频。
The software phase-locked loop (SPLL) technology in the steady speed control of permanent magnet brushless DC motor (BLDCM) in gyro was discussed.
研究了软件锁相环技术在陀螺用无位置传感器无刷直流电机稳速控制系统中的应用。
In the electronic instrumentation aspect, the phase-locked loop in instruments and so on in frequency synthesizer and phase meter played the vital role.
在电子仪器方面，锁相环在频率合成器和相位计等仪器中起了重要作用。
The design and implementation of quadrature waveform generator are described based on the AT89C52, phase-locked loop(PLL) and switched-capacitor filter(SCF).
描述了基于AT89C52单片机、锁相环和开关电容滤波器的正交信号发生器的设计和实现方法。
This article presents a new design structure of variable bandwidth phase-locked loop based on improving phase-locked loop of actively mode-locked fiber laser.
对主动锁模光纤激光器的锁相环进行改进，提出一种新型的“变带宽锁相环”的设计结构。
In this scheme, the output of the first phase-locked loop (PLL1) ACTS as the reference of DDS, and then the output of DDS stimulates the second phase-locked loop (PLL2).
此方案把第一个锁相环(PLL1)的输出作为DDS的参考信号，再用DDS的输出去激励第二个锁相环(PLL2)。
The fluorescence thermometry system in which the fluorescence lifetime is detected by phase-locked loop is established, and the specific phase-locked loop circuit is designed.
设计具体的锁相环电路，并建立利用锁相环技术检测荧光寿命的荧光温度传感器系统。
Signal demodulation of automatic block with audio frequency shift modulated track circuits was implemented with phase-locked loop (PLL) technique and a singe chip microcomputer.
利用锁相环(LL)窄带跟踪特性，与单片机结合，实现自动闭塞系统移频信号解调。
The simulation results prove that the three-phase phase-locked loop can work well in disturbance situation and variable frequency system when the frequency of the inputs is variable.
并对相位突变和频率突变的情况进行了仿真研究，说明在相位和频率发生变动时三相锁相环仍能有效地锁定相位，能够满足系统变频的要求。
In this paper we introduce the developmental phase and experimental equipments of long time delay phase-locked loop and also give the field test results via the satellite "Symphonic".
本文叙述了长延时锁相环的研制情况和实验设备，同时也给出了通过“交响乐”卫星的现场试验结果。
Subsequently, the detailed discussion of the software phase-locked loop technology and network process, the composition of the phase-locked loop circuit, the working principle of the study.
随后，本文详细讨论了并网过程中的软件锁相环技术，对锁相环电路的组成、工作原理进行了研究。
Introduces the basic principle of phase-locked loop and NE564 PLL circuit structure and properties, and the use of phase-locked NE564 demodulating circuit and phase-locked frequency circuit.
介绍了锁相环的基本原理和锁相环ne564的电路结构和性能，及其用ne564构成的锁相解调电路和锁相倍频电路。
This paper presents a new type of all digital phase-locked loop(ADPLL)used for extracting a bit-synchronous signal to meet the requirements of the fast phase-locked in burst digital communication.
本文根据突发式数字通信快速锁相要求，提出一种位同步信号提取的新的快速全数字锁相环方案。
This paper introduces the theory of the phase-locked loop (PLL) and the direct digital synthesis (DDS), a method to improve the precision of DDS and reduce its phase truncation error is also given.
介绍了锁相环(PLL)技术和直接数字式频率合成(DDS)技术的基本工作原理，给出了一种提高DDS输出频率精度及减小其相位截断误差的方法。
A novel multi-layer Charge-Pump Phase-Locked Loop (CP-PLL) behavioral model is presented in this paper.
提出了一种全新的电荷泵锁相环的行为级建模方法。
A novel multi-layer Charge-Pump Phase-Locked Loop (CP-PLL) behavioral model is presented in this paper.
提出了一种全新的电荷泵锁相环的行为级建模方法。
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