The race and hazard in the sequential logic circuit is quite essential and must be considered when designing logic circuit.
时序逻辑电路中的竞争冒险是电路设计中必须考虑到的重要方面。
This paper presents a multiple fault test simulator for sequential logic circuit. The simulator is implemented in serial-parallel to save memory.
本文给出一个时序逻辑电路的多故障测试模拟程序。
Building the transition relation of sequential logic circuit is one of the key technologies for applying model checking method to verify the sequential logic circuit.
有效地建立和表示时序逻辑电路的状态转移关系是应用模型检查方法验证时序逻辑电路的关键技术之一。
The principle of using sequential logic circuit and 8031 monolithic computer for realizing continuous pulse duration measure are introduced.
主要介绍了用时序逻辑电路实现连续脉冲宽度测量的工作原理，并讨论了采用8031单片机的实现方案。
The principle of using sequential logic circuit and 8031 monolithic computer for realizing continuous pulse duration measure are introduced.
主要介绍了用时序逻辑电路实现连续脉冲宽度测量的工作原理，并讨论了采用8031单片机的实现方案。
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