...本浏览模式- 文档 - 枢研网 关键词:全数字锁相环; 鉴频器;自动变模; 宽频带 [gap=1274]Keywords: all digital phase locked loop; frequency detecto r; automat ic modulus contr ol; larg e lock- in rang ..
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算法／程序语言 "algorithmic/procedural language 全数位式锁相回路 "all digital phase locked loop 全数字编号 "all numeral numbering ..
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The primary factor affecting fast phase lock is analyzed by using MATLAB. Then a fast all digital phase locked loop with a high precision automatic modulus control is proposed.
应用MATLAB分析了影响锁相环快速锁定的主要因素，提出了一种具有高精度自动变模控制的快速全数字锁相环。
This paper presents a new type of all digital phase-locked loop(ADPLL)used for extracting a bit-synchronous signal to meet the requirements of the fast phase-locked in burst digital communication.
本文根据突发式数字通信快速锁相要求，提出一种位同步信号提取的新的快速全数字锁相环方案。
All digital Phase-Locked Loop frequency tracking and digital SPWM realization technology based on FPGA are emphasized in the research.
重点研究了基于FPGA的全数字锁相环频率跟踪技术和数字化SPWM实现技术。
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