对微控制器而言，PDIUSBD12看起来就像一个带8位数据总线和一个地址位（占用两个位置）的存储器件。

To a micro-controller, the PDIUSBD12 appears as a memory device 8-bit data bus and 1 address bit (occupying 2 locations).

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SDRAM是当今一种流行的高速存储器。通过和普通sdram存储器对比，阐述了WISHBONE总线协议下ddr存储器控制器的设计方法和注意事项，并提出一种提高DDR工作效率的预测机制。

This paper based on the mechanism of DDR-SDRAM, gave a way to construct a DDR-SDRAM controller based on WISHBONE bus protocol, and also introduced a forecast method to improve DDR's performance.

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本发明揭示用于在总线业务减少的情况下执行存储器块初始化及复制功能的存储器控制器及方法。

A memory controller and methods for performing memory block initialization and copy functions with reduced bus traffic are disclosed.

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