digital multiplex switching system 数字复用转接系统 ; 数字多路转换系统
digital subscriber loop multiplex system 数字用户环路复用设备
Secondly, the paper studied the FPGA solutions of Digital Multiplex System. Designed FPGA circuit of module including Multiplex, demultiplex, bit synchronization and frame synchronization, mostly performance of bit synchronization and frame synchronization circuit are optimized.
其次,论文研究了基于FPGA的数字复接系统实现方案,实现了数字复接、数字分接、位同步及帧同步等单元模块的FPGA电路设计,优化了位同步及帧同步电路的主要性能指标。
参考来源 - FPGA/SOPC技术在数字通信系统中的应用研究·2,447,543篇论文数据，部分数据来源于NoteExpress
以上来源于: WordNet
This paper puts forward a design method of digital multiplex system with FPGA , and introduces the whole system of four bits synchronous multiplexing .
本文提出了基于FPGA技术实现数字复接系统的设计方案，并介绍了有代表性的较简单的四路同步复接器系统总体设计。
This paper puts forward a design method of digital multiplex system with FPGA, and introduces the whole system of multiplexing and demultiplexing between primary group and secondary group.
本文提出了基于FPGA技术实现数字复接系统的设计方案，并介绍了基群与二次群之间的复接与分接的系统总体设计。
In multiplex and demultiplex systems such as Synchronous Digital Hierarchy (SDH), timing processing is very important to system performance.
在复分接系统中，如同步数字系列(SDH)，定时处理占有重要地位。
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