The LOP circuit module is described in gate level with VHDL, which has passed the logic simulation and verification. It is applied to the design of floating-point adder.

LOP电路设计采用VHDL语言门级描述，已通过逻辑仿真验证，并在浮点加法器的设计中得到应用。

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The main gate is nothing more than a logic AND circuit.

主控门就算一个逻辑与电路。

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"The Gate" is such a circuit: it provides among the various input signals to meet a certain logic relations, the only output.

“门”是这样的一种电路：它规定各个输入信号之间满足某种逻辑关系时，才有信号输出。

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