Algorithm which has been implemented on QC-LDPC decoder includes: general structural design, each computation units and semi-parallel structure. This algorithm is universal to all QC-LDPC codes.
在FPGA上实现QC-LDPC码译码器的方法,包括总体结构设计、各运算单元设计以及利用准循环性实现半并行结构的方法,对于QC-LDPC码具有通用性。
参考来源 - 数字电视地面广播传输系统LDPC编解码方案设计·2,447,543篇论文数据，部分数据来源于NoteExpress
The complete set of HV parallel capacitors can be divided into the bulk frame type, assembling type and semi-closed type according to their structure type.
高压并联电容器成套装置按结构型式可分为散装框架式、集合式和半封闭式。
According to the structure of Quasi-Cyclic LDPC code, we can make a trade-off between hardware complexity and decoding throughput by applying semi-parallel architecture.
利用准循环ldpc码的结构特点，使用半并行结构的译码器可以实现复杂度和译码速率的有效折中。
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