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Hardware verification language

  • 硬件验证语言(硬件验证语言是用于电路设计验证的编程语言,类似C++或Java,同时提供位运算功能。它能生成带约束的随机激励,并提供功能覆盖结构,辅助设计人员进行复杂的硬件验证)

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  硬件验证语言

为了解决验证中存在的挑战,提高验证的完备性、可靠性、可重用性和验证效率,硬件验证语言Hardware Verification Language,HVL)的重要作用也在业界引起了广泛的关注。

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短语

Hardware Description and verification Language 硬件描述和验证语言

Hardware verification language

  • abstract: A Hardware Verification Language, or HVL, is a programming language used to verify the designs of electronic circuits written in a hardware description language. HVLs typically include features of a high-level programming language like C++ or Java as well as features for easy bit-level manipulation similar to those found in HDLs.

以上来源于: WordNet

双语例句

  • By practice proving, the verification of hardware circuits is an effective method in property specification language.

    通过实践证明属性说明语言验证硬件电路非常有效验证方法

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